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authorPeter Maydell <peter.maydell@linaro.org>2018-06-29 17:21:22 +0100
committerRichard Henderson <richard.henderson@linaro.org>2018-07-02 08:02:20 -0700
commite4c967a7201400d7f76e5847d5b4c4ac9e2566e0 (patch)
tree2fa74c6eba35a6a4daf82757764794d2a3414466 /accel/stubs
parent334692bce7f0653a93b8d84ecde8c847b08dec38 (diff)
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accel/tcg: Correct "is this a TLB miss" check in get_page_addr_code()
In commit 71b9a45330fe220d1 we changed the condition we use to determine whether we need to refill the TLB in get_page_addr_code() to if (unlikely(env->tlb_table[mmu_idx][index].addr_code != (addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK)))) { This isn't the right check (it will falsely fail if the input addr happens to have the low bit corresponding to TLB_INVALID_MASK set, for instance). Replace it with a use of the new tlb_hit() function, which is the correct test. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20180629162122.19376-3-peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'accel/stubs')
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