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author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-04-25 21:27:03 +0000 |
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committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-04-25 21:27:03 +0000 |
commit | 52c00a5f1560525089c17d3277a235fe38c1ca78 (patch) | |
tree | d0107f0cfda6b483337e96df4d879786db25d492 /TODO | |
parent | ab6d960ffa1271db6866fc2b27e97e99a73598d2 (diff) | |
download | qemu-52c00a5f1560525089c17d3277a235fe38c1ca78.zip qemu-52c00a5f1560525089c17d3277a235fe38c1ca78.tar.gz qemu-52c00a5f1560525089c17d3277a235fe38c1ca78.tar.bz2 |
update
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@757 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'TODO')
-rw-r--r-- | TODO | 12 |
1 files changed, 6 insertions, 6 deletions
@@ -1,21 +1,20 @@ short term: ---------- +- physical memory cache (reduce qemu-fast address space size to about 32 MB) +- better code fetch (different exception handling + CS.limit support) +- do not resize vga if invalid size. +- avoid looping if only exceptions - handle fast timers + add explicit clocks - OS/2 install bug -- handle Self Modifying Code even if modifying current TB (BE OS 5 install) -- physical memory cache (reduce qemu-fast address space size to about 32 MB) -- better code fetch -- XP security bug - cycle counter for all archs - TLB code protection support for PPC - add sysenter/sysexit and fxsr for L4 pistachio 686 - basic VGA optimizations -- disable SMC handling for ARM/SPARC/PPC +- disable SMC handling for ARM/SPARC/PPC (not finished) - see undefined flags for BTx insn - user/kernel PUSHL/POPL in helper.c - keyboard output buffer filling timing emulation - return UD exception if LOCK prefix incorrectly used -- cmos clock update and timers - test ldt limit < 7 ? - tests for each target CPU - fix CCOP optimisation @@ -26,6 +25,7 @@ short term: lower priority: -------------- +- HDD geometry in CMOS (not used except for very old DOS programs) - suppress shift_mem ops - fix some 16 bit sp push/pop overflow (pusha/popa, lcall lret) - sysenter/sysexit emulation |