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| author | Peter Maydell <peter.maydell@linaro.org> | 2018-08-24 13:17:31 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-08-24 13:17:31 +0100 |
| commit | 7210918cade19b7c6f14c4403aac0fd381c07b1d (patch) | |
| tree | d74d91f354be946190a5db4464b5529c4eeedf1b /README | |
| parent | 323cd490845acf663159ca26e35cb977ad9b85a2 (diff) | |
| download | qemu-7210918cade19b7c6f14c4403aac0fd381c07b1d.zip qemu-7210918cade19b7c6f14c4403aac0fd381c07b1d.tar.gz qemu-7210918cade19b7c6f14c4403aac0fd381c07b1d.tar.bz2 | |
hw/intc/arm_gic: Make per-cpu GICH memory regions 0x200 bytes large
Reduce the size of the per-cpu GICH memory regions from 0x1000
to 0x200. The registers only cover 0x200 bytes, and the Cortex-A15
wants to map them at a spacing of 0x200 bytes apart. Having the
region be too large interferes with mapping them like that, so
reduce it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Message-id: 20180821132811.17675-3-peter.maydell@linaro.org
Diffstat (limited to 'README')
0 files changed, 0 insertions, 0 deletions