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| author | Michael Walle <michael@walle.cc> | 2011-02-17 23:45:07 +0100 |
|---|---|---|
| committer | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2011-03-07 13:42:36 +0100 |
| commit | 4ef66fa71882a8f8682d9a8d1528e1ec98c264e5 (patch) | |
| tree | 853c28ded1d1d394dceb86920823c180ef99a57d /Makefile.target | |
| parent | 0c45d3d4b921e9639a2ce400a6afdb4d962a5805 (diff) | |
| download | qemu-4ef66fa71882a8f8682d9a8d1528e1ec98c264e5.zip qemu-4ef66fa71882a8f8682d9a8d1528e1ec98c264e5.tar.gz qemu-4ef66fa71882a8f8682d9a8d1528e1ec98c264e5.tar.bz2 | |
lm32: interrupt controller model
This patch adds the interrupt controller of the lm32. Because the PIC is
accessed through special control registers and opcodes, there are callbacks
from the lm32 translation code to this model.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'Makefile.target')
| -rw-r--r-- | Makefile.target | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Makefile.target b/Makefile.target index 857976a..a6e7e5a 100644 --- a/Makefile.target +++ b/Makefile.target @@ -248,6 +248,7 @@ obj-ppc-y += xilinx_uartlite.o obj-ppc-y += xilinx_ethlite.o # LM32 peripherals +obj-lm32-y += lm32_pic.o obj-mips-y = mips_r4k.o mips_jazz.o mips_malta.o mips_mipssim.o obj-mips-y += mips_addr.o mips_timer.o mips_int.o |