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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2023-08-21 14:59:52 +0200
committerSong Gao <gaosong@loongson.cn>2023-08-24 11:17:55 +0800
commit3da4004c217148b1662a6fa6a6198b1c5df1adbb (patch)
treefaded666bf61b225121f24350c32957bb7708adc
parentb0dd9a7d6dd15a6898e9c585b521e6bec79b25aa (diff)
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target/loongarch: Log I/O write accesses to CSR registers
Various CSR registers have Read/Write fields. We might want to see guest trying to change such registers. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20230821125959.28666-2-philmd@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn>
-rw-r--r--target/loongarch/cpu.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index ad93eca..7107968 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -544,6 +544,8 @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp)
static void loongarch_qemu_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{
+ qemu_log_mask(LOG_UNIMP, "[%s]: Unimplemented reg 0x%" HWADDR_PRIx "\n",
+ __func__, addr);
}
static uint64_t loongarch_qemu_read(void *opaque, hwaddr addr, unsigned size)