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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-01-12 11:24:32 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2023-01-23 13:32:38 +0000 |
| commit | 2a8af3825958e5d8c98b3ca92ac42a10e25db9e1 (patch) | |
| tree | af55992323929ac54ff8cdaf8efdf33fa0237267 | |
| parent | 3c9ee548948870c14235e3fa8fb235c0c1c20822 (diff) | |
| download | qemu-2a8af3825958e5d8c98b3ca92ac42a10e25db9e1.zip qemu-2a8af3825958e5d8c98b3ca92ac42a10e25db9e1.tar.gz qemu-2a8af3825958e5d8c98b3ca92ac42a10e25db9e1.tar.bz2 | |
target/arm/sme: Introduce aarch64_set_svcr()
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20230112102436.1913-4-philmd@linaro.org
Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org>
[PMD: Split patch in multiple tiny steps]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | linux-user/aarch64/cpu_loop.c | 2 | ||||
| -rw-r--r-- | linux-user/aarch64/signal.c | 2 | ||||
| -rw-r--r-- | target/arm/cpu.h | 1 | ||||
| -rw-r--r-- | target/arm/helper.c | 8 | ||||
| -rw-r--r-- | target/arm/sme_helper.c | 4 |
5 files changed, 13 insertions, 4 deletions
diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c index 9875d60..d53742e 100644 --- a/linux-user/aarch64/cpu_loop.c +++ b/linux-user/aarch64/cpu_loop.c @@ -93,8 +93,8 @@ void cpu_loop(CPUARMState *env) * On syscall, PSTATE.ZA is preserved, along with the ZA matrix. * PSTATE.SM is cleared, per SMSTOP, which does ResetSVEState. */ + aarch64_set_svcr(env, 0, R_SVCR_SM_MASK); if (FIELD_EX64(env->svcr, SVCR, SM)) { - env->svcr = FIELD_DP64(env->svcr, SVCR, SM, 0); arm_rebuild_hflags(env); arm_reset_sve_state(env); } diff --git a/linux-user/aarch64/signal.c b/linux-user/aarch64/signal.c index 6a2c6e0..b6e4dcb 100644 --- a/linux-user/aarch64/signal.c +++ b/linux-user/aarch64/signal.c @@ -669,11 +669,11 @@ static void target_setup_frame(int usig, struct target_sigaction *ka, * Invoke the signal handler with both SM and ZA disabled. * When clearing SM, ResetSVEState, per SMSTOP. */ + aarch64_set_svcr(env, 0, R_SVCR_SM_MASK | R_SVCR_ZA_MASK); if (FIELD_EX64(env->svcr, SVCR, SM)) { arm_reset_sve_state(env); } if (env->svcr) { - env->svcr = 0; arm_rebuild_hflags(env); } diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 1feb63b..ef61849 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1123,6 +1123,7 @@ int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq); void aarch64_sve_change_el(CPUARMState *env, int old_el, int new_el, bool el0_a64); +void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask); void arm_reset_sve_state(CPUARMState *env); /* diff --git a/target/arm/helper.c b/target/arm/helper.c index 22ea8fb..24c069b 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6725,11 +6725,19 @@ static CPAccessResult access_esm(CPUARMState *env, const ARMCPRegInfo *ri, return CP_ACCESS_OK; } +void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask) +{ + uint64_t change = (env->svcr ^ new) & mask; + + env->svcr ^= change; +} + static void svcr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) { helper_set_pstate_sm(env, FIELD_EX64(value, SVCR, SM)); helper_set_pstate_za(env, FIELD_EX64(value, SVCR, ZA)); + aarch64_set_svcr(env, value, -1); arm_rebuild_hflags(env); } diff --git a/target/arm/sme_helper.c b/target/arm/sme_helper.c index b5aefa3..94dc084 100644 --- a/target/arm/sme_helper.c +++ b/target/arm/sme_helper.c @@ -43,7 +43,7 @@ void helper_set_pstate_sm(CPUARMState *env, uint32_t i) if (i == FIELD_EX64(env->svcr, SVCR, SM)) { return; } - env->svcr ^= R_SVCR_SM_MASK; + aarch64_set_svcr(env, 0, R_SVCR_SM_MASK); arm_reset_sve_state(env); arm_rebuild_hflags(env); } @@ -53,7 +53,7 @@ void helper_set_pstate_za(CPUARMState *env, uint32_t i) if (i == FIELD_EX64(env->svcr, SVCR, ZA)) { return; } - env->svcr ^= R_SVCR_ZA_MASK; + aarch64_set_svcr(env, 0, R_SVCR_ZA_MASK); /* * ResetSMEState. |