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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-06-20 18:36:33 +0200 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-10-25 01:01:12 -0700 |
| commit | e0f46055a18e3d51ffe4c0a38e09c5263bd4f059 (patch) | |
| tree | be3f3e5c3c75dcd232c52e37599933eb400a815c | |
| parent | d9125cf27cbb2dcd457a95f336f8aaae87412525 (diff) | |
| download | qemu-e0f46055a18e3d51ffe4c0a38e09c5263bd4f059.zip qemu-e0f46055a18e3d51ffe4c0a38e09c5263bd4f059.tar.gz qemu-e0f46055a18e3d51ffe4c0a38e09c5263bd4f059.tar.bz2 | |
target/sparc: Set TCG_GUEST_DEFAULT_MO
Always use TSO, per the Oracle 2015 manual.
This is slightly less restrictive than the TCG_MO_ALL default,
and happens to match the i386 model, which will eliminate a few
extra barriers on that host.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | target/sparc/cpu.h | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index b3a98f1..9fc5c40 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -6,6 +6,29 @@ #include "exec/cpu-defs.h" #include "qemu/cpu-float.h" +/* + * From Oracle SPARC Architecture 2015: + * + * Compatibility notes: The PSO memory model described in SPARC V8 and + * SPARC V9 compatibility architecture specifications was never implemented + * in a SPARC V9 implementation and is not included in the Oracle SPARC + * Architecture specification. + * + * The RMO memory model described in the SPARC V9 specification was + * implemented in some non-Sun SPARC V9 implementations, but is not + * directly supported in Oracle SPARC Architecture 2015 implementations. + * + * Therefore always use TSO in QEMU. + * + * D.5 Specification of Partial Store Order (PSO) + * ... [loads] are followed by an implied MEMBAR #LoadLoad | #LoadStore. + * + * D.6 Specification of Total Store Order (TSO) + * ... PSO with the additional requirement that all [stores] are followed + * by an implied MEMBAR #StoreStore. + */ +#define TCG_GUEST_DEFAULT_MO (TCG_MO_LD_LD | TCG_MO_LD_ST | TCG_MO_ST_ST) + #if !defined(TARGET_SPARC64) #define TARGET_DPREGS 16 #else |