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| author | Max Filippov <jcmvbkbc@gmail.com> | 2022-04-21 13:38:58 -0700 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2022-05-06 15:27:40 -0700 |
| commit | dad266a1e35f0b24f07e6e18c67a02edf347c0b3 (patch) | |
| tree | b056472f474fd9ce39349e6e43e73b04a5a3ab6e | |
| parent | 4ee412df69907b5fc91489732b4013f23dc91083 (diff) | |
| download | qemu-dad266a1e35f0b24f07e6e18c67a02edf347c0b3.zip qemu-dad266a1e35f0b24f07e6e18c67a02edf347c0b3.tar.gz qemu-dad266a1e35f0b24f07e6e18c67a02edf347c0b3.tar.bz2 | |
target/xtensa: use tcg_constant_* for numbered special registers
Numbered special registers are small arrays of consecutive SRs. Use
tcg_constant_* for the SR index.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| -rw-r--r-- | target/xtensa/translate.c | 16 |
1 files changed, 4 insertions, 12 deletions
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 3cfcbf9..557e4e1 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -2613,15 +2613,13 @@ static void translate_wsr_ccompare(DisasContext *dc, const OpcodeArg arg[], { #ifndef CONFIG_USER_ONLY uint32_t id = par[0] - CCOMPARE; - TCGv_i32 tmp = tcg_const_i32(id); assert(id < dc->config->nccompare); if (tb_cflags(dc->base.tb) & CF_USE_ICOUNT) { gen_io_start(); } tcg_gen_mov_i32(cpu_SR[par[0]], arg[0].in); - gen_helper_update_ccompare(cpu_env, tmp); - tcg_temp_free(tmp); + gen_helper_update_ccompare(cpu_env, tcg_constant_i32(id)); #endif } @@ -2641,11 +2639,9 @@ static void translate_wsr_dbreaka(DisasContext *dc, const OpcodeArg arg[], { #ifndef CONFIG_USER_ONLY unsigned id = par[0] - DBREAKA; - TCGv_i32 tmp = tcg_const_i32(id); assert(id < dc->config->ndbreak); - gen_helper_wsr_dbreaka(cpu_env, tmp, arg[0].in); - tcg_temp_free(tmp); + gen_helper_wsr_dbreaka(cpu_env, tcg_constant_i32(id), arg[0].in); #endif } @@ -2654,11 +2650,9 @@ static void translate_wsr_dbreakc(DisasContext *dc, const OpcodeArg arg[], { #ifndef CONFIG_USER_ONLY unsigned id = par[0] - DBREAKC; - TCGv_i32 tmp = tcg_const_i32(id); assert(id < dc->config->ndbreak); - gen_helper_wsr_dbreakc(cpu_env, tmp, arg[0].in); - tcg_temp_free(tmp); + gen_helper_wsr_dbreakc(cpu_env, tcg_constant_i32(id), arg[0].in); #endif } @@ -2667,11 +2661,9 @@ static void translate_wsr_ibreaka(DisasContext *dc, const OpcodeArg arg[], { #ifndef CONFIG_USER_ONLY unsigned id = par[0] - IBREAKA; - TCGv_i32 tmp = tcg_const_i32(id); assert(id < dc->config->nibreak); - gen_helper_wsr_ibreaka(cpu_env, tmp, arg[0].in); - tcg_temp_free(tmp); + gen_helper_wsr_ibreaka(cpu_env, tcg_constant_i32(id), arg[0].in); #endif } |