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authorPeter Crosthwaite <peter.crosthwaite@xilinx.com>2013-02-28 18:23:14 +0000
committerPeter Maydell <peter.maydell@linaro.org>2013-02-28 18:49:19 +0000
commitb972b4e25340abdd23238bc8f3bdacbef533bd5a (patch)
treea33905e7606dcee6ca4ad9c1883651b75ce46396
parent80f4d9fcea86aeb3071750c199416cab9abd5c28 (diff)
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xilinx_zynq: Added SD controllers
The Xilinx Zynq device has two SDHCI controllers. Added to the machine model. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--hw/xilinx_zynq.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c
index 311f791..39d9fb3 100644
--- a/hw/xilinx_zynq.c
+++ b/hw/xilinx_zynq.c
@@ -187,6 +187,16 @@ static void zynq_init(QEMUMachineInitArgs *args)
}
}
+ dev = qdev_create(NULL, "generic-sdhci");
+ qdev_init_nofail(dev);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xE0100000);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[56-IRQ_OFFSET]);
+
+ dev = qdev_create(NULL, "generic-sdhci");
+ qdev_init_nofail(dev);
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xE0101000);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[79-IRQ_OFFSET]);
+
zynq_binfo.ram_size = ram_size;
zynq_binfo.kernel_filename = kernel_filename;
zynq_binfo.kernel_cmdline = kernel_cmdline;