diff options
author | Lluís Vilanova <vilanova@ac.upc.edu> | 2014-05-30 14:12:25 +0200 |
---|---|---|
committer | Stefan Hajnoczi <stefanha@redhat.com> | 2014-08-12 14:26:12 +0100 |
commit | a7e30d84ce8109b50ee73633f72802918836b19f (patch) | |
tree | 585dcafdfa85baade7c851288d15d76e9e7d221e | |
parent | 85d8bf2f36ae28b8d4b04f473886ce7f725a8b21 (diff) | |
download | qemu-a7e30d84ce8109b50ee73633f72802918836b19f.zip qemu-a7e30d84ce8109b50ee73633f72802918836b19f.tar.gz qemu-a7e30d84ce8109b50ee73633f72802918836b19f.tar.bz2 |
trace: [tcg] Include TCG-tracing header on all targets
Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
-rw-r--r-- | target-alpha/translate.c | 3 | ||||
-rw-r--r-- | target-arm/translate-a64.c | 2 | ||||
-rw-r--r-- | target-arm/translate.c | 3 | ||||
-rw-r--r-- | target-cris/translate.c | 3 | ||||
-rw-r--r-- | target-i386/translate.c | 3 | ||||
-rw-r--r-- | target-lm32/translate.c | 3 | ||||
-rw-r--r-- | target-m68k/translate.c | 3 | ||||
-rw-r--r-- | target-microblaze/translate.c | 3 | ||||
-rw-r--r-- | target-mips/translate.c | 3 | ||||
-rw-r--r-- | target-openrisc/translate.c | 3 | ||||
-rw-r--r-- | target-ppc/translate.c | 3 | ||||
-rw-r--r-- | target-s390x/translate.c | 2 | ||||
-rw-r--r-- | target-sh4/translate.c | 3 | ||||
-rw-r--r-- | target-sparc/translate.c | 3 | ||||
-rw-r--r-- | target-unicore32/translate.c | 3 | ||||
-rw-r--r-- | target-xtensa/translate.c | 3 |
16 files changed, 46 insertions, 0 deletions
diff --git a/target-alpha/translate.c b/target-alpha/translate.c index cc81e77..76658a0 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -26,6 +26,9 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + + #undef ALPHA_DEBUG_DISAS #define CONFIG_SOFTFLOAT_INLINE diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 33b5025..f04ca49 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -35,6 +35,8 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + static TCGv_i64 cpu_X[32]; static TCGv_i64 cpu_pc; static TCGv_i32 cpu_NF, cpu_ZF, cpu_CF, cpu_VF; diff --git a/target-arm/translate.c b/target-arm/translate.c index cf4e767..4012185 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -35,6 +35,9 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + + #define ENABLE_ARCH_4T arm_feature(env, ARM_FEATURE_V4T) #define ENABLE_ARCH_5 arm_feature(env, ARM_FEATURE_V5) /* currently all emulated v5 cores are also v5TE, so don't bother */ diff --git a/target-cris/translate.c b/target-cris/translate.c index ab0e479..e37b04e 100644 --- a/target-cris/translate.c +++ b/target-cris/translate.c @@ -33,6 +33,9 @@ #include "exec/helper-gen.h" +#include "trace-tcg.h" + + #define DISAS_CRIS 0 #if DISAS_CRIS # define LOG_DIS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__) diff --git a/target-i386/translate.c b/target-i386/translate.c index 6fcd824..418173e 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -32,6 +32,9 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + + #define PREFIX_REPZ 0x01 #define PREFIX_REPNZ 0x02 #define PREFIX_LOCK 0x04 diff --git a/target-lm32/translate.c b/target-lm32/translate.c index a51ade9..8454e8b 100644 --- a/target-lm32/translate.c +++ b/target-lm32/translate.c @@ -27,6 +27,9 @@ #include "exec/helper-gen.h" +#include "trace-tcg.h" + + #define DISAS_LM32 1 #if DISAS_LM32 # define LOG_DIS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 50df4d3..efd4cfc 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -27,6 +27,9 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + + //#define DEBUG_DISPATCH 1 /* Fake floating point. */ diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index 03ea158..fd2b771 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -26,6 +26,9 @@ #include "exec/cpu_ldst.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + + #define SIM_COMPAT 0 #define DISAS_GNU 1 #define DISAS_MB 1 diff --git a/target-mips/translate.c b/target-mips/translate.c index c381366..06db150 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -30,6 +30,9 @@ #include "exec/helper-gen.h" #include "sysemu/kvm.h" +#include "trace-tcg.h" + + #define MIPS_DEBUG_DISAS 0 //#define MIPS_DEBUG_SIGN_EXTENSIONS diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c index 55ff935..407bd97 100644 --- a/target-openrisc/translate.c +++ b/target-openrisc/translate.c @@ -31,6 +31,9 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + + #define OPENRISC_DISAS #ifdef OPENRISC_DISAS diff --git a/target-ppc/translate.c b/target-ppc/translate.c index b23933f..c07bb01 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -27,6 +27,9 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + + #define CPU_SINGLE_STEP 0x1 #define CPU_BRANCH_STEP 0x2 #define GDBSTUB_SINGLE_STEP 0x4 diff --git a/target-s390x/translate.c b/target-s390x/translate.c index e2a1d05..0cb036f 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -42,6 +42,8 @@ static TCGv_ptr cpu_env; #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + /* Information that (most) every instruction needs to manipulate. */ typedef struct DisasContext DisasContext; diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 8126818..3088edc 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -28,6 +28,9 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + + typedef struct DisasContext { struct TranslationBlock *tb; target_ulong pc; diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 1ab07a1..78c4e21 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -32,6 +32,9 @@ #include "exec/helper-gen.h" +#include "trace-tcg.h" + + #define DEBUG_DISAS #define DYNAMIC_PC 1 /* dynamic pc value */ diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c index e3643c2..653c225 100644 --- a/target-unicore32/translate.c +++ b/target-unicore32/translate.c @@ -23,6 +23,9 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + + /* internal defines */ typedef struct DisasContext { target_ulong pc; diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index 2f22cce..badca19 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c @@ -41,6 +41,9 @@ #include "exec/helper-proto.h" #include "exec/helper-gen.h" +#include "trace-tcg.h" + + typedef struct DisasContext { const XtensaConfig *config; TranslationBlock *tb; |