diff options
author | Daniel Henrique Barboza <danielhb413@gmail.com> | 2022-06-24 05:49:16 -0300 |
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committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2022-08-31 14:08:05 -0300 |
commit | 805150619e47eea910c760e1fde8d3e7e61a3a24 (patch) | |
tree | 2c5266696fa6ccdfa09624817c6ca0570e1d7d52 | |
parent | 5ba76b61a2d3c90daa264bbaa14464eb3c49caa9 (diff) | |
download | qemu-805150619e47eea910c760e1fde8d3e7e61a3a24.zip qemu-805150619e47eea910c760e1fde8d3e7e61a3a24.tar.gz qemu-805150619e47eea910c760e1fde8d3e7e61a3a24.tar.bz2 |
ppc/pnv: remove pnv-phb3-root-port
The unified pnv-phb-root-port can be used in its place. There is no ABI
breakage in doing so because no official QEMU release introduced user
creatable pnv-phb3-root-port devices.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <20220624084921.399219-8-danielhb413@gmail.com>
-rw-r--r-- | hw/pci-host/pnv_phb.c | 2 | ||||
-rw-r--r-- | hw/pci-host/pnv_phb3.c | 42 | ||||
-rw-r--r-- | hw/ppc/pnv.c | 1 | ||||
-rw-r--r-- | include/hw/pci-host/pnv_phb3.h | 6 |
4 files changed, 2 insertions, 49 deletions
diff --git a/hw/pci-host/pnv_phb.c b/hw/pci-host/pnv_phb.c index 5e61f85..cdddc6a 100644 --- a/hw/pci-host/pnv_phb.c +++ b/hw/pci-host/pnv_phb.c @@ -34,7 +34,7 @@ static void pnv_phb_realize(DeviceState *dev, Error **errp) switch (phb->version) { case 3: phb_typename = g_strdup(TYPE_PNV_PHB3); - phb_rootport_typename = g_strdup(TYPE_PNV_PHB3_ROOT_PORT); + phb_rootport_typename = g_strdup(TYPE_PNV_PHB_ROOT_PORT); break; case 4: phb_typename = g_strdup(TYPE_PNV_PHB4); diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c index ad9e983..d4c04a2 100644 --- a/hw/pci-host/pnv_phb3.c +++ b/hw/pci-host/pnv_phb3.c @@ -1122,51 +1122,9 @@ static const TypeInfo pnv_phb3_root_bus_info = { .class_init = pnv_phb3_root_bus_class_init, }; -static void pnv_phb3_root_port_realize(DeviceState *dev, Error **errp) -{ - PCIERootPortClass *rpc = PCIE_ROOT_PORT_GET_CLASS(dev); - PCIDevice *pci = PCI_DEVICE(dev); - Error *local_err = NULL; - - rpc->parent_realize(dev, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } - pci_config_set_interrupt_pin(pci->config, 0); -} - -static void pnv_phb3_root_port_class_init(ObjectClass *klass, void *data) -{ - DeviceClass *dc = DEVICE_CLASS(klass); - PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); - PCIERootPortClass *rpc = PCIE_ROOT_PORT_CLASS(klass); - - dc->desc = "IBM PHB3 PCIE Root Port"; - - device_class_set_parent_realize(dc, pnv_phb3_root_port_realize, - &rpc->parent_realize); - dc->user_creatable = false; - - k->vendor_id = PCI_VENDOR_ID_IBM; - k->device_id = 0x03dc; - k->revision = 0; - - rpc->exp_offset = 0x48; - rpc->aer_offset = 0x100; -} - -static const TypeInfo pnv_phb3_root_port_info = { - .name = TYPE_PNV_PHB3_ROOT_PORT, - .parent = TYPE_PCIE_ROOT_PORT, - .instance_size = sizeof(PnvPHB3RootPort), - .class_init = pnv_phb3_root_port_class_init, -}; - static void pnv_phb3_register_types(void) { type_register_static(&pnv_phb3_root_bus_info); - type_register_static(&pnv_phb3_root_port_info); type_register_static(&pnv_phb3_type_info); type_register_static(&pnv_phb3_iommu_memory_region_info); } diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index ae6cd14..672227a 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -2129,6 +2129,7 @@ static void pnv_machine_power8_class_init(ObjectClass *oc, void *data) static GlobalProperty phb_compat[] = { { TYPE_PNV_PHB, "version", "3" }, + { TYPE_PNV_PHB_ROOT_PORT, "version", "3" }, }; mc->desc = "IBM PowerNV (Non-Virtualized) POWER8"; diff --git a/include/hw/pci-host/pnv_phb3.h b/include/hw/pci-host/pnv_phb3.h index 3b9ff10..bff6920 100644 --- a/include/hw/pci-host/pnv_phb3.h +++ b/include/hw/pci-host/pnv_phb3.h @@ -108,12 +108,6 @@ struct PnvPBCQState { */ #define TYPE_PNV_PHB3_ROOT_BUS "pnv-phb3-root" -#define TYPE_PNV_PHB3_ROOT_PORT "pnv-phb3-root-port" - -typedef struct PnvPHB3RootPort { - PCIESlot parent_obj; -} PnvPHB3RootPort; - /* * PHB3 PCIe Host Bridge for PowerNV machines (POWER8) */ |