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author | Richard Henderson <rth@twiddle.net> | 2012-08-22 15:59:19 -0700 |
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committer | Richard Henderson <rth@twiddle.net> | 2013-01-05 12:18:40 -0800 |
commit | 7691c23b1f7b508f3f5391e8f362579544be6980 (patch) | |
tree | 9160cd7f14a242a6af8f4fcc82a2cdd028624213 | |
parent | e025e52aba7063c8137b7812e10d69500efb1fbb (diff) | |
download | qemu-7691c23b1f7b508f3f5391e8f362579544be6980.zip qemu-7691c23b1f7b508f3f5391e8f362579544be6980.tar.gz qemu-7691c23b1f7b508f3f5391e8f362579544be6980.tar.bz2 |
target-s390: Convert LLGT
Signed-off-by: Richard Henderson <rth@twiddle.net>
-rw-r--r-- | target-s390x/insn-data.def | 3 | ||||
-rw-r--r-- | target-s390x/translate.c | 50 |
2 files changed, 9 insertions, 44 deletions
diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index fa3ee00..8914d34 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -285,6 +285,9 @@ D(0xa50d, LLIHL, RI_a, Z, 0, i2_16u_shl, 0, r1, mov2, 0, 32) D(0xa50e, LLILH, RI_a, Z, 0, i2_16u_shl, 0, r1, mov2, 0, 16) D(0xa50f, LLILL, RI_a, Z, 0, i2_16u_shl, 0, r1, mov2, 0, 0) +/* LOAD LOGICAL THIRTY ONE BITS */ + C(0xb917, LLGTR, RRE, Z, 0, r2_o, r1, 0, llgt, 0) + C(0xe317, LLGT, RXY_a, Z, 0, m2_32u, r1, 0, llgt, 0) /* LOAD NEGATIVE */ C(0x1100, LNR, RR_a, Z, 0, r2_32s, new, r1_32, nabs, nabs32) C(0xb901, LNGR, RRE, Z, 0, r2, r1, 0, nabs, nabs64) diff --git a/target-s390x/translate.c b/target-s390x/translate.c index f8c1ea7..033f93e 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -1001,30 +1001,6 @@ static void free_compare(DisasCompare *c) } } -static void disas_e3(CPUS390XState *env, DisasContext* s, int op, int r1, - int x2, int b2, int d2) -{ - TCGv_i64 addr, tmp2; - - LOG_DISAS("disas_e3: op 0x%x r1 %d x2 %d b2 %d d2 %d\n", - op, r1, x2, b2, d2); - addr = get_address(s, x2, b2, d2); - switch (op) { - case 0x17: /* LLGT R1,D2(X2,B2) [RXY] */ - tmp2 = tcg_temp_new_i64(); - tcg_gen_qemu_ld32u(tmp2, addr, get_mem_index(s)); - tcg_gen_andi_i64(tmp2, tmp2, 0x7fffffffULL); - store_reg(r1, tmp2); - tcg_temp_free_i64(tmp2); - break; - default: - LOG_DISAS("illegal e3 operation 0x%x\n", op); - gen_illegal_opcode(s); - break; - } - tcg_temp_free_i64(addr); -} - static void disas_ed(CPUS390XState *env, DisasContext *s, int op, int r1, int x2, int b2, int d2, int r1b) { @@ -1804,15 +1780,6 @@ static void disas_b9(CPUS390XState *env, DisasContext *s, int op, int r1, LOG_DISAS("disas_b9: op 0x%x r1 %d r2 %d\n", op, r1, r2); switch (op) { - case 0x17: /* LLGTR R1,R2 [RRE] */ - tmp32_1 = load_reg32(r2); - tmp = tcg_temp_new_i64(); - tcg_gen_andi_i32(tmp32_1, tmp32_1, 0x7fffffffUL); - tcg_gen_extu_i32_i64(tmp, tmp32_1); - store_reg(r1, tmp); - tcg_temp_free_i32(tmp32_1); - tcg_temp_free_i64(tmp); - break; case 0x83: /* FLOGR R1,R2 [RRE] */ tmp = load_reg(r2); tmp32_1 = tcg_const_i32(r1); @@ -1858,17 +1825,6 @@ static void disas_s390_insn(CPUS390XState *env, DisasContext *s) op = (insn >> 16) & 0xff; disas_b9(env, s, op, r1, r2); break; - case 0xe3: - insn = ld_code6(env, s->pc); - debug_insn(insn); - op = insn & 0xff; - r1 = (insn >> 36) & 0xf; - x2 = (insn >> 32) & 0xf; - b2 = (insn >> 28) & 0xf; - d2 = ((int)((((insn >> 16) & 0xfff) - | ((insn << 4) & 0xff000)) << 12)) >> 12; - disas_e3(env, s, op, r1, x2, b2, d2 ); - break; case 0xed: insn = ld_code6(env, s->pc); debug_insn(insn); @@ -2654,6 +2610,12 @@ static ExitStatus op_insi(DisasContext *s, DisasOps *o) return NO_EXIT; } +static ExitStatus op_llgt(DisasContext *s, DisasOps *o) +{ + tcg_gen_andi_i64(o->out, o->in2, 0x7fffffff); + return NO_EXIT; +} + static ExitStatus op_ld8s(DisasContext *s, DisasOps *o) { tcg_gen_qemu_ld8s(o->out, o->in2, get_mem_index(s)); |