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| author | Pranith Kumar <bobby.prani@gmail.com> | 2017-08-29 02:33:11 -0400 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2017-09-05 12:56:40 -0700 |
| commit | 71650df7b0ee0600308810a267a123b971b3d533 (patch) | |
| tree | 4ce849c8d71dfcedd8982a2e3c93c778684019df | |
| parent | a46c1244a0d65d5f37fc12e4d42f2479eac87b52 (diff) | |
| download | qemu-71650df7b0ee0600308810a267a123b971b3d533.zip qemu-71650df7b0ee0600308810a267a123b971b3d533.tar.gz qemu-71650df7b0ee0600308810a267a123b971b3d533.tar.bz2 | |
tcg: Add tcg target default memory ordering
Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>
Message-Id: <20170829063313.10237-3-bobby.prani@gmail.com>
[rth: Dropped ia64 hunk]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | tcg/aarch64/tcg-target.h | 2 | ||||
| -rw-r--r-- | tcg/arm/tcg-target.h | 2 | ||||
| -rw-r--r-- | tcg/mips/tcg-target.h | 2 | ||||
| -rw-r--r-- | tcg/ppc/tcg-target.h | 2 | ||||
| -rw-r--r-- | tcg/s390/tcg-target.h | 2 | ||||
| -rw-r--r-- | tcg/sparc/tcg-target.h | 2 |
6 files changed, 12 insertions, 0 deletions
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h index 55a46ac..b41a248 100644 --- a/tcg/aarch64/tcg-target.h +++ b/tcg/aarch64/tcg-target.h @@ -117,4 +117,6 @@ static inline void flush_icache_range(uintptr_t start, uintptr_t stop) __builtin___clear_cache((char *)start, (char *)stop); } +#define TCG_TARGET_DEFAULT_MO (0) + #endif /* AARCH64_TCG_TARGET_H */ diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index 5ef1086..a38be15 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -134,4 +134,6 @@ static inline void flush_icache_range(uintptr_t start, uintptr_t stop) __builtin___clear_cache((char *) start, (char *) stop); } +#define TCG_TARGET_DEFAULT_MO (0) + #endif diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index d75cb63..e9558d1 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -206,4 +206,6 @@ static inline void flush_icache_range(uintptr_t start, uintptr_t stop) cacheflush ((void *)start, stop-start, ICACHE); } +#define TCG_TARGET_DEFAULT_MO (0) + #endif diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index 5f4a40a..5a092b0 100644 --- a/tcg/ppc/tcg-target.h +++ b/tcg/ppc/tcg-target.h @@ -125,4 +125,6 @@ extern bool have_isa_3_00; void flush_icache_range(uintptr_t start, uintptr_t stop); +#define TCG_TARGET_DEFAULT_MO (0) + #endif diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h index 957f0c0..dc0e591 100644 --- a/tcg/s390/tcg-target.h +++ b/tcg/s390/tcg-target.h @@ -133,6 +133,8 @@ extern uint64_t s390_facilities; #define TCG_TARGET_EXTEND_ARGS 1 +#define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) + enum { TCG_AREG0 = TCG_REG_R10, }; diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index 854a0af..4515c9a 100644 --- a/tcg/sparc/tcg-target.h +++ b/tcg/sparc/tcg-target.h @@ -162,6 +162,8 @@ extern bool use_vis3_instructions; #define TCG_AREG0 TCG_REG_I0 +#define TCG_TARGET_DEFAULT_MO (0) + static inline void flush_icache_range(uintptr_t start, uintptr_t stop) { uintptr_t p; |