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| author | Aurelien Jarno <aurelien@aurel32.net> | 2013-03-26 19:56:01 +0100 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2013-04-01 18:49:16 +0200 |
| commit | 649ad05ed4133d3a48d43881aa9351c024d9cdc1 (patch) | |
| tree | 42b710109b96adfcffa837440355638a3e21e7a9 | |
| parent | 2b8d7e9d728fe2b7c8ffb9859368fb2b5c0bf833 (diff) | |
| download | qemu-649ad05ed4133d3a48d43881aa9351c024d9cdc1.zip qemu-649ad05ed4133d3a48d43881aa9351c024d9cdc1.tar.gz qemu-649ad05ed4133d3a48d43881aa9351c024d9cdc1.tar.bz2 | |
target-i386: SSE4.2: fix pcmpXstrX instructions in "Ranges" mode
Fix the order of the of the comparisons to match the "Intel 64 and
IA-32 Architectures Software Developer's Manual".
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
| -rw-r--r-- | target-i386/ops_sse.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target-i386/ops_sse.h b/target-i386/ops_sse.h index 4a95f41..51c5fc9 100644 --- a/target-i386/ops_sse.h +++ b/target-i386/ops_sse.h @@ -2019,8 +2019,8 @@ static inline unsigned pcmpxstrx(CPUX86State *env, Reg *d, Reg *s, res <<= 1; v = pcmp_val(s, ctrl, j); for (i = ((validd - 1) | 1); i >= 0; i -= 2) { - res |= (pcmp_val(d, ctrl, i - 0) <= v && - pcmp_val(d, ctrl, i - 1) >= v); + res |= (pcmp_val(d, ctrl, i - 0) >= v && + pcmp_val(d, ctrl, i - 1) <= v); } } break; |