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authorCédric Le Goater <clg@kaod.org>2022-01-04 07:55:33 +0100
committerCédric Le Goater <clg@kaod.org>2022-01-04 07:55:33 +0100
commit316717feb32ae5dc64802d5c3a7d1e2beac9f155 (patch)
tree7dac999f13a6d99769001122d44f65bb2365e715
parentb5a3d8bc9146ba22a25116cb748c97341bf99737 (diff)
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ppc/pnv: Change the maximum of PHB3 devices for Power8NVL
The POWER8 processors with a NVLink logic unit have 4 PHB3 devices per chip. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20211222063817.1541058-2-clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
-rw-r--r--hw/ppc/pnv.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 29ee0d0..9de8b83 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1314,7 +1314,7 @@ static void pnv_chip_power8nvl_class_init(ObjectClass *klass, void *data)
k->chip_cfam_id = 0x120d304980000000ull; /* P8 Naples DD1.0 */
k->cores_mask = POWER8_CORE_MASK;
- k->num_phbs = 3;
+ k->num_phbs = 4;
k->core_pir = pnv_chip_core_pir_p8;
k->intc_create = pnv_chip_power8_intc_create;
k->intc_reset = pnv_chip_power8_intc_reset;