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| author | Jeff Kubascik <jeff.kubascik@dornerworks.com> | 2020-01-17 14:09:31 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-01-17 14:27:16 +0000 |
| commit | 30d544839e278dc76017b9a42990c41e84a34377 (patch) | |
| tree | 6c7c500d2c8dfa76d4805445c70ec7eb981ad601 | |
| parent | ef1255212a721e3ebc2be4bec9426bda9d2ee308 (diff) | |
| download | qemu-30d544839e278dc76017b9a42990c41e84a34377.zip qemu-30d544839e278dc76017b9a42990c41e84a34377.tar.gz qemu-30d544839e278dc76017b9a42990c41e84a34377.tar.bz2 | |
target/arm: Return correct IL bit in merge_syn_data_abort
The IL bit is set for 32-bit instructions, thus passing false
with the is_16bit parameter to syn_data_abort_with_iss() makes
a syn mask that always has the IL bit set.
Pass is_16bit as true to make the initial syn mask have IL=0,
so that the final IL value comes from or'ing template_syn.
Cc: qemu-stable@nongnu.org
Fixes: aaa1f954d4ca ("target-arm: A64: Create Instruction Syndromes for Data Aborts")
Signed-off-by: Jeff Kubascik <jeff.kubascik@dornerworks.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200117004618.2742-2-richard.henderson@linaro.org
[rth: Extracted this as a self-contained bug fix from a larger patch]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target/arm/tlb_helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c index 5feb312..e63f8bd 100644 --- a/target/arm/tlb_helper.c +++ b/target/arm/tlb_helper.c @@ -44,7 +44,7 @@ static inline uint32_t merge_syn_data_abort(uint32_t template_syn, syn = syn_data_abort_with_iss(same_el, 0, 0, 0, 0, 0, ea, 0, s1ptw, is_write, fsc, - false); + true); /* Merge the runtime syndrome with the template syndrome. */ syn |= template_syn; } |