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authorAurelien Jarno <aurelien@aurel32.net>2017-05-01 23:20:43 +0200
committerAurelien Jarno <aurelien@aurel32.net>2017-05-13 11:18:27 +0200
commit143021b26ffe1a468236c824003caaf4fd7d4831 (patch)
tree793a3a5dda785093b5c754148f1a7fbfcbddbfc6
parentcb32f179e00c51b32bf37a15191179b4fc472d29 (diff)
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target/sh4: movua.l is an SH4-A only instruction
At the same time change the comment describing the instruction the same way than other instruction, so that the code is easier to read and search. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
-rw-r--r--target/sh4/translate.c26
1 files changed, 15 insertions, 11 deletions
diff --git a/target/sh4/translate.c b/target/sh4/translate.c
index baed19b..4bb9105 100644
--- a/target/sh4/translate.c
+++ b/target/sh4/translate.c
@@ -1501,17 +1501,21 @@ static void _decode_opc(DisasContext * ctx)
}
ctx->has_movcal = 1;
return;
- case 0x40a9:
- /* MOVUA.L @Rm,R0 (Rm) -> R0
- Load non-boundary-aligned data */
- tcg_gen_qemu_ld_i32(REG(0), REG(B11_8), ctx->memidx, MO_TEUL);
- return;
- case 0x40e9:
- /* MOVUA.L @Rm+,R0 (Rm) -> R0, Rm + 4 -> Rm
- Load non-boundary-aligned data */
- tcg_gen_qemu_ld_i32(REG(0), REG(B11_8), ctx->memidx, MO_TEUL);
- tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 4);
- return;
+ case 0x40a9: /* movua.l @Rm,R0 */
+ /* Load non-boundary-aligned data */
+ if (ctx->features & SH_FEATURE_SH4A) {
+ tcg_gen_qemu_ld_i32(REG(0), REG(B11_8), ctx->memidx, MO_TEUL);
+ return;
+ }
+ break;
+ case 0x40e9: /* movua.l @Rm+,R0 */
+ /* Load non-boundary-aligned data */
+ if (ctx->features & SH_FEATURE_SH4A) {
+ tcg_gen_qemu_ld_i32(REG(0), REG(B11_8), ctx->memidx, MO_TEUL);
+ tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 4);
+ return;
+ }
+ break;
case 0x0029: /* movt Rn */
tcg_gen_mov_i32(REG(B11_8), cpu_sr_t);
return;