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authorXiao Guangrong <guangrong.xiao@linux.intel.com>2015-10-29 15:31:39 +0800
committerEduardo Habkost <ehabkost@redhat.com>2015-11-06 12:19:33 -0200
commit0c47242b519a224279f13c685aa6e79347f97b85 (patch)
tree11d51368cfeb1791d09cfefd13af184cd497f2b3
parent891bc821a3ee462b09b1ec436f2891f00ab1f85b (diff)
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target-i386: Add clflushopt/clwb/pcommit to TCG_7_0_EBX_FEATURES
Now these instructions are handled by TCG and can be added to the TCG_7_0_EBX_FEATURES macro. Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
-rw-r--r--target-i386/cpu.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 0d080c1..e5f1c5b 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -345,7 +345,9 @@ static const char *cpuid_6_feature_name[] = {
#define TCG_SVM_FEATURES 0
#define TCG_KVM_FEATURES 0
#define TCG_7_0_EBX_FEATURES (CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_SMAP | \
- CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ADX)
+ CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ADX | \
+ CPUID_7_0_EBX_PCOMMIT | CPUID_7_0_EBX_CLFLUSHOPT | \
+ CPUID_7_0_EBX_CLWB)
/* missing:
CPUID_7_0_EBX_FSGSBASE, CPUID_7_0_EBX_HLE, CPUID_7_0_EBX_AVX2,
CPUID_7_0_EBX_ERMS, CPUID_7_0_EBX_INVPCID, CPUID_7_0_EBX_RTM,