apic: improve debugging

Add a DPRINTF macro. Use TARGET_FMT_plx for printing target_phys_addr_t
items. Add a separate flag for debugging coalescing interrupts.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>

1 files changed, 30 insertions, 13 deletions

diff --git a/hw/apic.c b/hw/apic.c
index 9029dad..7fbd79b 100644
--- a/hw/apic.c
+++ b/hw/apic.c
@@ -26,6 +26,21 @@
 #include "kvm.h"
 
 //#define DEBUG_APIC
+//#define DEBUG_COALESCING
+
+#ifdef DEBUG_APIC
+#define DPRINTF(fmt, ...)                                       \
+    do { printf("apic: " fmt , ## __VA_ARGS__); } while (0)
+#else
+#define DPRINTF(fmt, ...)
+#endif
+
+#ifdef DEBUG_COALESCING
+#define DPRINTF_C(fmt, ...)                                     \
+    do { printf("apic: " fmt , ## __VA_ARGS__); } while (0)
+#else
+#define DPRINTF_C(fmt, ...)
+#endif
 
 /* APIC Local Vector Table */
 #define APIC_LVT_TIMER   0
@@ -158,6 +173,8 @@ static void apic_local_deliver(CPUState *env, int vector)
     uint32_t lvt = s->lvt[vector];
     int trigger_mode;
 
+    DPRINTF("%s: vector %d delivery mode %d\n", __func__, vector,
+            (lvt >> 8) & 7);
     if (lvt & APIC_LVT_MASKED)
         return;
 
@@ -287,6 +304,9 @@ void apic_deliver_irq(uint8_t dest, uint8_t dest_mode,
 {
     uint32_t deliver_bitmask[MAX_APIC_WORDS];
 
+    DPRINTF("%s: dest %d dest_mode %d delivery_mode %d vector %d"
+            " polarity %d trigger_mode %d\n", __func__, dest, dest_mode,
+            delivery_mode, vector_num, polarity, trigger_mode);
     apic_get_delivery_bitmask(deliver_bitmask, dest, dest_mode);
     apic_bus_deliver(deliver_bitmask, delivery_mode, vector_num, polarity,
                      trigger_mode);
@@ -295,9 +315,8 @@ void apic_deliver_irq(uint8_t dest, uint8_t dest_mode,
 void cpu_set_apic_base(CPUState *env, uint64_t val)
 {
     APICState *s = env->apic_state;
-#ifdef DEBUG_APIC
-    printf("cpu_set_apic_base: %016" PRIx64 "\n", val);
-#endif
+
+    DPRINTF("cpu_set_apic_base: %016" PRIx64 "\n", val);
     if (!s)
         return;
     s->apicbase = (val & 0xfffff000) |
@@ -313,10 +332,9 @@ void cpu_set_apic_base(CPUState *env, uint64_t val)
 uint64_t cpu_get_apic_base(CPUState *env)
 {
     APICState *s = env->apic_state;
-#ifdef DEBUG_APIC
-    printf("cpu_get_apic_base: %016" PRIx64 "\n",
-           s ? (uint64_t)s->apicbase: 0);
-#endif
+
+    DPRINTF("cpu_get_apic_base: %016" PRIx64 "\n",
+            s ? (uint64_t)s->apicbase: 0);
     return s ? s->apicbase : 0;
 }
 
@@ -386,17 +404,20 @@ static void apic_update_irq(APICState *s)
 
 void apic_reset_irq_delivered(void)
 {
+    DPRINTF_C("%s: old coalescing %d\n", __func__, apic_irq_delivered);
     apic_irq_delivered = 0;
 }
 
 int apic_get_irq_delivered(void)
 {
+    DPRINTF_C("%s: returning coalescing %d\n", __func__, apic_irq_delivered);
     return apic_irq_delivered;
 }
 
 static void apic_set_irq(APICState *s, int vector_num, int trigger_mode)
 {
     apic_irq_delivered += !get_bit(s->irr, vector_num);
+    DPRINTF_C("%s: coalescing %d\n", __func__, apic_irq_delivered);
 
     set_bit(s->irr, vector_num);
     if (trigger_mode)
@@ -755,9 +776,7 @@ static uint32_t apic_mem_readl(void *opaque, target_phys_addr_t addr)
         val = 0;
         break;
     }
-#ifdef DEBUG_APIC
-    printf("APIC read: %08x = %08x\n", (uint32_t)addr, val);
-#endif
+    DPRINTF("read: " TARGET_FMT_plx " = %08x\n", addr, val);
     return val;
 }
 
@@ -792,9 +811,7 @@ static void apic_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
         return;
     s = env->apic_state;
 
-#ifdef DEBUG_APIC
-    printf("APIC write: %08x = %08x\n", (uint32_t)addr, val);
-#endif
+    DPRINTF("write: " TARGET_FMT_plx " = %08x\n", addr, val);
 
     switch(index) {
     case 0x02: