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author | Fernando Eckhardt Valle <phervalle@gmail.com> | 2021-10-29 17:23:54 -0300 |
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committer | David Gibson <david@gibson.dropbear.id.au> | 2021-11-09 10:32:51 +1100 |
commit | dcb4e5b72cffbbb09b149ce34898e58c3f581c62 (patch) | |
tree | 6c276f718aa592cadd88ec84d7ff2f0f0f85b817 | |
parent | fbd2e60ef1bdd626c1430a6c1c653e63fed56040 (diff) | |
download | qemu-dcb4e5b72cffbbb09b149ce34898e58c3f581c62.zip qemu-dcb4e5b72cffbbb09b149ce34898e58c3f581c62.tar.gz qemu-dcb4e5b72cffbbb09b149ce34898e58c3f581c62.tar.bz2 |
target/ppc: Implement PLFS, PLFD, PSTFS and PSTFD instructions
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Fernando Eckhardt Valle <fernando.valle@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211029202424.175401-5-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
-rw-r--r-- | target/ppc/insn64.decode | 11 | ||||
-rw-r--r-- | target/ppc/translate/fp-impl.c.inc | 14 |
2 files changed, 25 insertions, 0 deletions
diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode index 72c5944..11e5ea8 100644 --- a/target/ppc/insn64.decode +++ b/target/ppc/insn64.decode @@ -56,6 +56,17 @@ PSTD 000001 00 0--.-- .................. \ PADDI 000001 10 0--.-- .................. \ 001110 ..... ..... ................ @PLS_D +### Float-Point Load and Store Instructions + +PLFS 000001 10 0--.-- .................. \ + 110000 ..... ..... ................ @PLS_D +PLFD 000001 10 0--.-- .................. \ + 110010 ..... ..... ................ @PLS_D +PSTFS 000001 10 0--.-- .................. \ + 110100 ..... ..... ................ @PLS_D +PSTFD 000001 10 0--.-- .................. \ + 110110 ..... ..... ................ @PLS_D + ### Prefixed No-operation Instruction @PNOP 000001 11 0000-- 000000000000000000 \ diff --git a/target/ppc/translate/fp-impl.c.inc b/target/ppc/translate/fp-impl.c.inc index 57a799d..d1dbb1b 100644 --- a/target/ppc/translate/fp-impl.c.inc +++ b/target/ppc/translate/fp-impl.c.inc @@ -1342,6 +1342,16 @@ static bool do_lsfp_D(DisasContext *ctx, arg_D *a, bool update, bool store, single); } +static bool do_lsfp_PLS_D(DisasContext *ctx, arg_PLS_D *a, bool update, + bool store, bool single) +{ + arg_D d; + if (!resolve_PLS_D(ctx, &d, a)) { + return true; + } + return do_lsfp_D(ctx, &d, update, store, single); +} + static bool do_lsfp_X(DisasContext *ctx, arg_X *a, bool update, bool store, bool single) { @@ -1352,21 +1362,25 @@ TRANS(LFS, do_lsfp_D, false, false, true) TRANS(LFSU, do_lsfp_D, true, false, true) TRANS(LFSX, do_lsfp_X, false, false, true) TRANS(LFSUX, do_lsfp_X, true, false, true) +TRANS(PLFS, do_lsfp_PLS_D, false, false, true) TRANS(LFD, do_lsfp_D, false, false, false) TRANS(LFDU, do_lsfp_D, true, false, false) TRANS(LFDX, do_lsfp_X, false, false, false) TRANS(LFDUX, do_lsfp_X, true, false, false) +TRANS(PLFD, do_lsfp_PLS_D, false, false, false) TRANS(STFS, do_lsfp_D, false, true, true) TRANS(STFSU, do_lsfp_D, true, true, true) TRANS(STFSX, do_lsfp_X, false, true, true) TRANS(STFSUX, do_lsfp_X, true, true, true) +TRANS(PSTFS, do_lsfp_PLS_D, false, true, true) TRANS(STFD, do_lsfp_D, false, true, false) TRANS(STFDU, do_lsfp_D, true, true, false) TRANS(STFDX, do_lsfp_X, false, true, false) TRANS(STFDUX, do_lsfp_X, true, true, false) +TRANS(PSTFD, do_lsfp_PLS_D, false, true, false) #undef _GEN_FLOAT_ACB #undef GEN_FLOAT_ACB |