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authorPeter Maydell <peter.maydell@linaro.org>2022-08-22 15:12:27 +0100
committerRichard Henderson <richard.henderson@linaro.org>2022-09-13 17:18:21 +0100
commitb35d74015b0262260b7dbb75c80ea85aeebab89b (patch)
tree2c0e398193a540d3e4db280caded39f71623d5ab
parenta52417e1eeb4501993e29145d16faac59e8465ca (diff)
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target/mips: Honour -semihosting-config userspace=on
Honour the commandline -semihosting-config userspace=on option, instead of always permitting userspace semihosting calls in system emulation mode, by passing the correct value to the is_userspace argument of semihosting_enabled(). Note that this is a behaviour change: if the user wants to do semihosting calls from userspace they must now specifically enable them on the command line. MIPS semihosting is not implemented for linux-user builds. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220822141230.3658237-5-peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r--target/mips/tcg/micromips_translate.c.inc6
-rw-r--r--target/mips/tcg/mips16e_translate.c.inc2
-rw-r--r--target/mips/tcg/nanomips_translate.c.inc4
-rw-r--r--target/mips/tcg/translate.c9
4 files changed, 11 insertions, 10 deletions
diff --git a/target/mips/tcg/micromips_translate.c.inc b/target/mips/tcg/micromips_translate.c.inc
index b2c696f..632895c 100644
--- a/target/mips/tcg/micromips_translate.c.inc
+++ b/target/mips/tcg/micromips_translate.c.inc
@@ -825,7 +825,7 @@ static void gen_pool16c_insn(DisasContext *ctx)
generate_exception_break(ctx, extract32(ctx->opcode, 0, 4));
break;
case SDBBP16:
- if (is_uhi(extract32(ctx->opcode, 0, 4))) {
+ if (is_uhi(ctx, extract32(ctx->opcode, 0, 4))) {
ctx->base.is_jmp = DISAS_SEMIHOST;
} else {
/*
@@ -941,7 +941,7 @@ static void gen_pool16c_r6_insn(DisasContext *ctx)
break;
case R6_SDBBP16:
/* SDBBP16 */
- if (is_uhi(extract32(ctx->opcode, 6, 4))) {
+ if (is_uhi(ctx, extract32(ctx->opcode, 6, 4))) {
ctx->base.is_jmp = DISAS_SEMIHOST;
} else {
if (ctx->hflags & MIPS_HFLAG_SBRI) {
@@ -1310,7 +1310,7 @@ static void gen_pool32axf(CPUMIPSState *env, DisasContext *ctx, int rt, int rs)
generate_exception_end(ctx, EXCP_SYSCALL);
break;
case SDBBP:
- if (is_uhi(extract32(ctx->opcode, 16, 10))) {
+ if (is_uhi(ctx, extract32(ctx->opcode, 16, 10))) {
ctx->base.is_jmp = DISAS_SEMIHOST;
} else {
check_insn(ctx, ISA_MIPS_R1);
diff --git a/target/mips/tcg/mips16e_translate.c.inc b/target/mips/tcg/mips16e_translate.c.inc
index 7568933..918b15d 100644
--- a/target/mips/tcg/mips16e_translate.c.inc
+++ b/target/mips/tcg/mips16e_translate.c.inc
@@ -951,7 +951,7 @@ static int decode_ase_mips16e(CPUMIPSState *env, DisasContext *ctx)
}
break;
case RR_SDBBP:
- if (is_uhi(extract32(ctx->opcode, 5, 6))) {
+ if (is_uhi(ctx, extract32(ctx->opcode, 5, 6))) {
ctx->base.is_jmp = DISAS_SEMIHOST;
} else {
/*
diff --git a/target/mips/tcg/nanomips_translate.c.inc b/target/mips/tcg/nanomips_translate.c.inc
index b3aff22..812c111 100644
--- a/target/mips/tcg/nanomips_translate.c.inc
+++ b/target/mips/tcg/nanomips_translate.c.inc
@@ -3694,7 +3694,7 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *env, DisasContext *ctx)
generate_exception_end(ctx, EXCP_BREAK);
break;
case NM_SDBBP:
- if (is_uhi(extract32(ctx->opcode, 0, 19))) {
+ if (is_uhi(ctx, extract32(ctx->opcode, 0, 19))) {
ctx->base.is_jmp = DISAS_SEMIHOST;
} else {
if (ctx->hflags & MIPS_HFLAG_SBRI) {
@@ -4633,7 +4633,7 @@ static int decode_isa_nanomips(CPUMIPSState *env, DisasContext *ctx)
generate_exception_end(ctx, EXCP_BREAK);
break;
case NM_SDBBP16:
- if (is_uhi(extract32(ctx->opcode, 0, 3))) {
+ if (is_uhi(ctx, extract32(ctx->opcode, 0, 3))) {
ctx->base.is_jmp = DISAS_SEMIHOST;
} else {
if (ctx->hflags & MIPS_HFLAG_SBRI) {
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 0d936e2..c3f92ea 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -12082,12 +12082,13 @@ static void gen_cache_operation(DisasContext *ctx, uint32_t op, int base,
tcg_temp_free_i32(t0);
}
-static inline bool is_uhi(int sdbbp_code)
+static inline bool is_uhi(DisasContext *ctx, int sdbbp_code)
{
#ifdef CONFIG_USER_ONLY
return false;
#else
- return semihosting_enabled() && sdbbp_code == 1;
+ bool is_user = (ctx->hflags & MIPS_HFLAG_KSU) == MIPS_HFLAG_UM;
+ return semihosting_enabled(is_user) && sdbbp_code == 1;
#endif
}
@@ -13898,7 +13899,7 @@ static void decode_opc_special_r6(CPUMIPSState *env, DisasContext *ctx)
}
break;
case R6_OPC_SDBBP:
- if (is_uhi(extract32(ctx->opcode, 6, 20))) {
+ if (is_uhi(ctx, extract32(ctx->opcode, 6, 20))) {
ctx->base.is_jmp = DISAS_SEMIHOST;
} else {
if (ctx->hflags & MIPS_HFLAG_SBRI) {
@@ -14310,7 +14311,7 @@ static void decode_opc_special2_legacy(CPUMIPSState *env, DisasContext *ctx)
gen_cl(ctx, op1, rd, rs);
break;
case OPC_SDBBP:
- if (is_uhi(extract32(ctx->opcode, 6, 20))) {
+ if (is_uhi(ctx, extract32(ctx->opcode, 6, 20))) {
ctx->base.is_jmp = DISAS_SEMIHOST;
} else {
/*