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| author | Jamin Lin <jamin_lin@aspeedtech.com> | 2022-05-25 10:31:33 +0200 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2022-05-25 10:31:33 +0200 |
| commit | 3d393bb7d3348142868d2af651500949881d41f0 (patch) | |
| tree | 27e24a9d6c372ade38569968d5bc8ce2a0ddb30a | |
| parent | 3757b0d08b399c609954cf57f273b1167e5d7a8d (diff) | |
| download | qemu-3d393bb7d3348142868d2af651500949881d41f0.zip qemu-3d393bb7d3348142868d2af651500949881d41f0.tar.gz qemu-3d393bb7d3348142868d2af651500949881d41f0.tar.bz2 | |
docs: add minibmc section in aspeed document
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20220506031521.13254-2-jamin_lin@aspeedtech.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
| -rw-r--r-- | docs/system/arm/aspeed.rst | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst index 60ed94f..6f2e4fb 100644 --- a/docs/system/arm/aspeed.rst +++ b/docs/system/arm/aspeed.rst @@ -120,3 +120,64 @@ FMC chip and a bigger (64M) SPI chip, use : .. code-block:: bash -M ast2500-evb,fmc-model=mx25l25635e,spi-model=mx66u51235f + + +Aspeed minibmc family boards (``ast1030-evb``) +================================================================== + +The QEMU Aspeed machines model mini BMCs of various Aspeed evaluation +boards. They are based on different releases of the +Aspeed SoC : the AST1030 integrating an ARM Cortex M4F CPU (200MHz). + +The SoC comes with SRAM, SPI, I2C, etc. + +AST1030 SoC based machines : + +- ``ast1030-evb`` Aspeed AST1030 Evaluation board (Cortex-M4F) + +Supported devices +----------------- + + * SMP (for the AST1030 Cortex-M4F) + * Interrupt Controller (VIC) + * Timer Controller + * I2C Controller + * System Control Unit (SCU) + * SRAM mapping + * Static Memory Controller (SMC or FMC) - Only SPI Flash support + * SPI Memory Controller + * USB 2.0 Controller + * Watchdog Controller + * GPIO Controller (Master only) + * UART + * LPC Peripheral Controller (a subset of subdevices are supported) + * Hash/Crypto Engine (HACE) - Hash support only. TODO: HMAC and RSA + * ADC + + +Missing devices +--------------- + + * PWM and Fan Controller + * Slave GPIO Controller + * PECI Controller + * Mailbox Controller + * Virtual UART + * eSPI Controller + * I3C Controller + +Boot options +------------ + +The Aspeed machines can be started using the ``-kernel`` to load a +Zephyr OS or from a firmware. Images can be downloaded from the +ASPEED GitHub release repository : + + https://github.com/AspeedTech-BMC/zephyr/releases + +To boot a kernel directly from a Zephyr build tree: + +.. code-block:: bash + + $ qemu-system-arm -M ast1030-evb -nographic \ + -kernel zephyr.elf |