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| author | Richard Henderson <richard.henderson@linaro.org> | 2017-09-14 09:51:06 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2017-10-25 11:55:21 +0200 |
| commit | 110f6c703bb6d99419196c3c5e369880c994d0bd (patch) | |
| tree | 1c9d1b37b95a2a29b2a4631d2945978e719ab244 | |
| parent | b666d2a41a177c70a72f4b54d6cac71494d143d0 (diff) | |
| download | qemu-110f6c703bb6d99419196c3c5e369880c994d0bd.zip qemu-110f6c703bb6d99419196c3c5e369880c994d0bd.tar.gz qemu-110f6c703bb6d99419196c3c5e369880c994d0bd.tar.bz2 | |
arm: Support Capstone in disas_set_info
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | disas.c | 3 | ||||
| -rw-r--r-- | target/arm/cpu.c | 21 |
2 files changed, 21 insertions, 3 deletions
@@ -450,6 +450,7 @@ void disas(FILE *out, void *code, unsigned long size) print_insn = print_insn_ppc; #elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS) print_insn = print_insn_arm_a64; + s.info.cap_arch = CS_ARCH_ARM64; #elif defined(__alpha__) print_insn = print_insn_alpha; #elif defined(__sparc__) @@ -457,6 +458,8 @@ void disas(FILE *out, void *code, unsigned long size) s.info.mach = bfd_mach_sparc_v9b; #elif defined(__arm__) print_insn = print_insn_arm; + s.info.cap_arch = CS_ARCH_ARM; + /* TCG only generates code for arm mode. */ #elif defined(__MIPSEB__) print_insn = print_insn_big_mips; #elif defined(__MIPSEL__) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index a92d86f..a0ed11c 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -33,6 +33,7 @@ #include "sysemu/sysemu.h" #include "sysemu/hw_accel.h" #include "kvm_arm.h" +#include "disas/capstone.h" static void arm_cpu_set_pc(CPUState *cs, vaddr value) { @@ -487,10 +488,24 @@ static void arm_disas_set_info(CPUState *cpu, disassemble_info *info) #if defined(CONFIG_ARM_A64_DIS) info->print_insn = print_insn_arm_a64; #endif - } else if (env->thumb) { - info->print_insn = print_insn_thumb1; + info->cap_arch = CS_ARCH_ARM64; } else { - info->print_insn = print_insn_arm; + int cap_mode; + if (env->thumb) { + info->print_insn = print_insn_thumb1; + cap_mode = CS_MODE_THUMB; + } else { + info->print_insn = print_insn_arm; + cap_mode = CS_MODE_ARM; + } + if (arm_feature(env, ARM_FEATURE_V8)) { + cap_mode |= CS_MODE_V8; + } + if (arm_feature(env, ARM_FEATURE_M)) { + cap_mode |= CS_MODE_MCLASS; + } + info->cap_arch = CS_ARCH_ARM; + info->cap_mode = cap_mode; } sctlr_b = arm_sctlr_b(env); |