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author | Michael S. Tsirkin <mst@redhat.com> | 2015-07-08 10:06:15 +0300 |
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committer | Michael S. Tsirkin <mst@redhat.com> | 2015-07-08 12:38:30 +0300 |
commit | c4fc82bf1ad088a84ccedf779f6aa928e4fadb5f (patch) | |
tree | 1f0dfbb915e1658bd5c55d36c4f1ab3eacb83e0b | |
parent | 1e40356ce5f6ccfa0bb57104a533c62952c560ce (diff) | |
download | qemu-c4fc82bf1ad088a84ccedf779f6aa928e4fadb5f.zip qemu-c4fc82bf1ad088a84ccedf779f6aa928e4fadb5f.tar.gz qemu-c4fc82bf1ad088a84ccedf779f6aa928e4fadb5f.tar.bz2 |
tco-test: fix up config accesses and re-enable
The mistake that made the test fail was that it tried to
use a BAR address as an offset for config accesses to LPC.
Config accesses don't need a BAR, and LPC does not have one. Don't
attempt to map it.
With this change applied, TCO test passes, so re-enable it.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
-rw-r--r-- | tests/Makefile | 2 | ||||
-rw-r--r-- | tests/tco-test.c | 15 |
2 files changed, 4 insertions, 13 deletions
diff --git a/tests/Makefile b/tests/Makefile index 52ae178..ef1e981 100644 --- a/tests/Makefile +++ b/tests/Makefile @@ -152,7 +152,7 @@ check-qtest-i386-y += tests/i440fx-test$(EXESUF) check-qtest-i386-y += tests/fw_cfg-test$(EXESUF) check-qtest-i386-y += tests/drive_del-test$(EXESUF) check-qtest-i386-y += tests/wdt_ib700-test$(EXESUF) -#check-qtest-i386-y += tests/tco-test$(EXESUF) +check-qtest-i386-y += tests/tco-test$(EXESUF) gcov-files-i386-y += hw/watchdog/watchdog.c hw/watchdog/wdt_ib700.c check-qtest-i386-y += $(check-qtest-pci-y) gcov-files-i386-y += $(gcov-files-pci-y) diff --git a/tests/tco-test.c b/tests/tco-test.c index 6a48188..419f7cf 100644 --- a/tests/tco-test.c +++ b/tests/tco-test.c @@ -44,7 +44,6 @@ typedef struct { const char *args; bool noreboot; QPCIDevice *dev; - void *lpc_base; void *tco_io_base; } TestData; @@ -65,22 +64,14 @@ static void test_init(TestData *d) d->dev = qpci_device_find(bus, QPCI_DEVFN(0x1f, 0x00)); g_assert(d->dev != NULL); - /* map PCI-to-LPC bridge interface BAR */ - d->lpc_base = qpci_iomap(d->dev, 0, NULL); - qpci_device_enable(d->dev); - g_assert(d->lpc_base != NULL); - /* set ACPI PM I/O space base address */ - qpci_config_writel(d->dev, (uintptr_t)d->lpc_base + ICH9_LPC_PMBASE, - PM_IO_BASE_ADDR | 0x1); + qpci_config_writel(d->dev, ICH9_LPC_PMBASE, PM_IO_BASE_ADDR | 0x1); /* enable ACPI I/O */ - qpci_config_writeb(d->dev, (uintptr_t)d->lpc_base + ICH9_LPC_ACPI_CTRL, - 0x80); + qpci_config_writeb(d->dev, ICH9_LPC_ACPI_CTRL, 0x80); /* set Root Complex BAR */ - qpci_config_writel(d->dev, (uintptr_t)d->lpc_base + ICH9_LPC_RCBA, - RCBA_BASE_ADDR | 0x1); + qpci_config_writel(d->dev, ICH9_LPC_RCBA, RCBA_BASE_ADDR | 0x1); d->tco_io_base = (void *)((uintptr_t)PM_IO_BASE_ADDR + 0x60); } |