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| author | Sergey Fedorov <s.fedorov@samsung.com> | 2013-12-20 10:33:11 +0400 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-01-07 19:18:07 +0000 |
| commit | d045815a5712afbeb8d2c76d8b624c91cfda777c (patch) | |
| tree | eaa2a9a701e416f8ca412ddb8c818bcc285c9381 | |
| parent | 294cdac2a02d3172b69c84dec727d6ac6006bb59 (diff) | |
| download | qemu-d045815a5712afbeb8d2c76d8b624c91cfda777c.zip qemu-d045815a5712afbeb8d2c76d8b624c91cfda777c.tar.gz qemu-d045815a5712afbeb8d2c76d8b624c91cfda777c.tar.bz2 | |
target-arm: use c13_context field for CONTEXTIDR
Use c13_context field instead of c13_fcse for CONTEXTIDR register
definition.
Signed-off-by: Sergey Fedorov <s.fedorov@samsung.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1387521191-15350-1-git-send-email-s.fedorov@samsung.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target-arm/helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index 9afec28..be52c1f 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -397,7 +397,7 @@ static const ARMCPRegInfo cp_reginfo[] = { .access = PL1_RW, .fieldoffset = offsetof(CPUARMState, cp15.c13_fcse), .resetvalue = 0, .writefn = fcse_write, .raw_writefn = raw_write, }, { .name = "CONTEXTIDR", .cp = 15, .crn = 13, .crm = 0, .opc1 = 0, .opc2 = 1, - .access = PL1_RW, .fieldoffset = offsetof(CPUARMState, cp15.c13_fcse), + .access = PL1_RW, .fieldoffset = offsetof(CPUARMState, cp15.c13_context), .resetvalue = 0, .writefn = contextidr_write, .raw_writefn = raw_write, }, /* ??? This covers not just the impdef TLB lockdown registers but also * some v7VMSA registers relating to TEX remap, so it is overly broad. |