Fix remaining compiler warnings for mips targets.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6111 c046a42c-6fe2-441c-8c8c-71466251a162

6 files changed, 26 insertions, 26 deletions

diff --git a/cpu-exec.c b/cpu-exec.c
index 0a49a7e..aaf6114 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -1008,7 +1008,7 @@ static inline int handle_cpu_signal(unsigned long pc, unsigned long address,
     /* we restore the process signal mask as the sigreturn should
        do it (XXX: use sigsetjmp) */
         sigprocmask(SIG_SETMASK, old_set, NULL);
-        do_raise_exception_err(env->exception_index, env->error_code);
+        cpu_loop_exit();
     } else {
         /* activate soft MMU for this block */
         cpu_resume_from_signal(env, puc);
diff --git a/mips-dis.c b/mips-dis.c
index 5b0b247..10b0fea 100644
--- a/mips-dis.c
+++ b/mips-dis.c
@@ -3272,7 +3272,7 @@ choose_arch_by_number (unsigned long mach)
   return c;
 }
 
-void
+static void
 set_default_mips_dis_options (struct disassemble_info *info)
 {
   const struct mips_arch_choice *chosen_arch;
@@ -3321,7 +3321,7 @@ set_default_mips_dis_options (struct disassemble_info *info)
 #endif
 }
 
-void
+static void
 parse_mips_dis_option (const char *option, unsigned int len)
 {
   unsigned int i, optionlen, vallen;
@@ -4809,7 +4809,6 @@ print_mips16_insn_arg (char type,
       abort ();
     }
 }
-#endif
 
 void
 print_mips_disassembler_options (FILE *stream)
@@ -4863,3 +4862,4 @@ with the -M switch (multiple options should be separated by commas):\n"));
 
   fprintf (stream, _("\n"));
 }
+#endif
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 86a7680..3fa0c38 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -561,9 +561,26 @@ enum {
 
 int cpu_mips_exec(CPUMIPSState *s);
 CPUMIPSState *cpu_mips_init(const char *cpu_model);
-uint32_t cpu_mips_get_clock (void);
+//~ uint32_t cpu_mips_get_clock (void);
 int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc);
 
+/* mips_timer.c */
+uint32_t cpu_mips_get_random (CPUState *env);
+uint32_t cpu_mips_get_count (CPUState *env);
+void cpu_mips_store_count (CPUState *env, uint32_t value);
+void cpu_mips_store_compare (CPUState *env, uint32_t value);
+void cpu_mips_start_count(CPUState *env);
+void cpu_mips_stop_count(CPUState *env);
+
+/* mips_int.c */
+void cpu_mips_update_irq (CPUState *env);
+
+/* helper.c */
+int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
+                               int mmu_idx, int is_softmmu);
+void do_interrupt (CPUState *env);
+void r4k_invalidate_tlb (CPUState *env, int idx, int use_extra);
+
 static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
 {
     env->active_tc.PC = tb->pc;
diff --git a/target-mips/exec.h b/target-mips/exec.h
index 8ab6437..07eb62f 100644
--- a/target-mips/exec.h
+++ b/target-mips/exec.h
@@ -24,21 +24,6 @@ void fpu_dump_state(CPUState *env, FILE *f,
                     int (*fpu_fprintf)(FILE *f, const char *fmt, ...),
                     int flags);
 
-int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
-                               int mmu_idx, int is_softmmu);
-void do_interrupt (CPUState *env);
-void r4k_invalidate_tlb (CPUState *env, int idx, int use_extra);
-
-void do_raise_exception_err (uint32_t exception, int error_code);
-void do_raise_exception (uint32_t exception);
-
-uint32_t cpu_mips_get_random (CPUState *env);
-uint32_t cpu_mips_get_count (CPUState *env);
-void cpu_mips_store_count (CPUState *env, uint32_t value);
-void cpu_mips_store_compare (CPUState *env, uint32_t value);
-void cpu_mips_start_count(CPUState *env);
-void cpu_mips_stop_count(CPUState *env);
-void cpu_mips_update_irq (CPUState *env);
 void cpu_mips_clock_init (CPUState *env);
 void cpu_mips_tlb_flush (CPUState *env, int flush_global);
 
diff --git a/target-mips/helper.c b/target-mips/helper.c
index 9340ad0..283bd4d 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -220,10 +220,6 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
     }
 }
 
-void cpu_mips_init_mmu (CPUState *env)
-{
-}
-
 int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
                                int mmu_idx, int is_softmmu)
 {
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index 27f58c2..4433fde 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -54,7 +54,8 @@ void do_interrupt_restart (void)
     }
 }
 
-void do_restore_state (void *pc_ptr)
+#if !defined(CONFIG_USER_ONLY)
+static void do_restore_state (void *pc_ptr)
 {
     TranslationBlock *tb;
     unsigned long pc = (unsigned long) pc_ptr;
@@ -64,6 +65,7 @@ void do_restore_state (void *pc_ptr)
         cpu_restore_state (tb, env, pc, NULL);
     }
 }
+#endif
 
 target_ulong do_clo (target_ulong t0)
 {
@@ -1356,7 +1358,6 @@ void do_mtc0_status_irqraise_debug(void)
 {
     fprintf(logfile, "Raise pending IRQs\n");
 }
-#endif /* !CONFIG_USER_ONLY */
 
 /* MIPS MT functions */
 target_ulong do_mftgpr(uint32_t sel)
@@ -1495,6 +1496,7 @@ target_ulong do_evpe(target_ulong t0)
 
     return t0;
 }
+#endif /* !CONFIG_USER_ONLY */
 
 void do_fork(target_ulong t0, target_ulong t1)
 {