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authorGerd Hoffmann <kraxel@redhat.com>2009-07-31 12:30:14 +0200
committerAnthony Liguori <aliguori@us.ibm.com>2009-08-10 13:05:28 -0500
commitf915a11563a6b4377acbf9ff800bcfbc9225f1d3 (patch)
tree70bc1a4f938eea10282b8c9d919848f7a5cf0891
parentd176c495b6664b72dc1e595f6e89dc5648aa248b (diff)
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qdev/isa: add isa bus support to qdev.
Pretty simple and straigt forward. IRQs modeled simliar to sysbus. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Message-Id:
-rw-r--r--Makefile.target10
-rw-r--r--hw/isa-bus.c102
-rw-r--r--hw/isa.h25
3 files changed, 132 insertions, 5 deletions
diff --git a/Makefile.target b/Makefile.target
index b611193..856a9bd 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -327,7 +327,7 @@ obj-y += e1000.o
obj-y += wdt_ib700.o wdt_i6300esb.o
# Hardware support
-obj-i386-y = ide.o pckbd.o vga.o $(sound-obj-y) dma.o
+obj-i386-y = ide.o pckbd.o vga.o $(sound-obj-y) dma.o isa-bus.o
obj-i386-y += fdc.o mc146818rtc.o serial.o i8259.o i8254.o pcspk.o pc.o
obj-i386-y += cirrus_vga.o apic.o ioapic.o parallel.o acpi.o piix_pci.o
obj-i386-y += usb-uhci.o vmmouse.o vmport.o vmware_vga.o hpet.o
@@ -338,7 +338,7 @@ CPPFLAGS += -DHAS_AUDIO -DHAS_AUDIO_CHOICE
endif
# shared objects
-obj-ppc-y = ppc.o ide.o vga.o $(sound-obj-y) dma.o openpic.o
+obj-ppc-y = ppc.o ide.o vga.o $(sound-obj-y) dma.o isa-bus.o openpic.o
# PREP target
obj-ppc-y += pckbd.o serial.o i8259.o i8254.o fdc.o mc146818rtc.o
obj-ppc-y += prep_pci.o ppc_prep.o
@@ -366,7 +366,7 @@ obj-mips-y = mips_r4k.o mips_jazz.o mips_malta.o mips_mipssim.o
obj-mips-y += mips_timer.o mips_int.o dma.o vga.o serial.o i8254.o i8259.o rc4030.o
obj-mips-y += g364fb.o jazz_led.o dp8393x.o
obj-mips-y += ide.o gt64xxx.o pckbd.o fdc.o mc146818rtc.o usb-uhci.o acpi.o ds1225y.o
-obj-mips-y += piix_pci.o parallel.o cirrus_vga.o pcspk.o $(sound-obj-y)
+obj-mips-y += piix_pci.o parallel.o cirrus_vga.o isa-bus.o pcspk.o $(sound-obj-y)
obj-mips-y += mipsnet.o
obj-mips-y += pflash_cfi01.o
obj-mips-y += vmware_vga.o
@@ -401,12 +401,12 @@ obj-cris-y += etraxfs_ser.o
obj-cris-y += pflash_cfi02.o
ifeq ($(TARGET_ARCH), sparc64)
-obj-sparc-y = sun4u.o ide.o pckbd.o vga.o apb_pci.o
+obj-sparc-y = sun4u.o ide.o isa-bus.o pckbd.o vga.o apb_pci.o
obj-sparc-y += fdc.o mc146818rtc.o serial.o
obj-sparc-y += cirrus_vga.o parallel.o
else
obj-sparc-y = sun4m.o tcx.o iommu.o slavio_intctl.o
-obj-sparc-y += slavio_timer.o slavio_misc.o fdc.o sparc32_dma.o
+obj-sparc-y += slavio_timer.o slavio_misc.o fdc.o isa-bus.o sparc32_dma.o
obj-sparc-y += cs4231.o eccmemctl.o sbi.o sun4c_intctl.o
endif
diff --git a/hw/isa-bus.c b/hw/isa-bus.c
new file mode 100644
index 0000000..8c14b1d
--- /dev/null
+++ b/hw/isa-bus.c
@@ -0,0 +1,102 @@
+/*
+ * isa bus support for qdev.
+ *
+ * Copyright (c) 2009 Gerd Hoffmann <kraxel@redhat.com>
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+#include "hw.h"
+#include "sysemu.h"
+#include "isa.h"
+
+struct ISABus {
+ BusState qbus;
+};
+static ISABus *isabus;
+
+static struct BusInfo isa_bus_info = {
+ .name = "ISA",
+ .size = sizeof(ISABus),
+ .props = (Property[]) {
+ {
+ .name = "iobase",
+ .info = &qdev_prop_hex32,
+ .offset = offsetof(ISADevice, iobase[0]),
+ .defval = (uint32_t[]) { -1 },
+ },{
+ .name = "iobase2",
+ .info = &qdev_prop_hex32,
+ .offset = offsetof(ISADevice, iobase[1]),
+ .defval = (uint32_t[]) { -1 },
+ },
+ {/* end of list */}
+ }
+};
+
+ISABus *isa_bus_new(DeviceState *dev)
+{
+ if (isabus) {
+ fprintf(stderr, "Can't create a second ISA bus\n");
+ return NULL;
+ }
+
+ isabus = FROM_QBUS(ISABus, qbus_create(&isa_bus_info, dev, NULL));
+ return isabus;
+}
+
+void isa_connect_irq(ISADevice *dev, int n, qemu_irq irq)
+{
+ assert(n >= 0 && n < dev->nirqs);
+ if (dev->irqs[n])
+ *dev->irqs[n] = irq;
+}
+
+void isa_init_irq(ISADevice *dev, qemu_irq *p)
+{
+ assert(dev->nirqs < ARRAY_SIZE(dev->irqs));
+ dev->irqs[dev->nirqs] = p;
+ dev->nirqs++;
+}
+
+static void isa_qdev_init(DeviceState *qdev, DeviceInfo *base)
+{
+ ISADevice *dev = DO_UPCAST(ISADevice, qdev, qdev);
+ ISADeviceInfo *info = DO_UPCAST(ISADeviceInfo, qdev, base);
+
+ info->init(dev);
+}
+
+void isa_qdev_register(ISADeviceInfo *info)
+{
+ info->qdev.init = isa_qdev_init;
+ info->qdev.bus_info = &isa_bus_info;
+ qdev_register(&info->qdev);
+}
+
+ISADevice *isa_create_simple(const char *name, uint32_t iobase, uint32_t iobase2)
+{
+ DeviceState *dev;
+ ISADevice *isa;
+
+ if (!isabus) {
+ fprintf(stderr, "Tried to create isa device %s with no isa bus present.\n", name);
+ return NULL;
+ }
+ dev = qdev_create(&isabus->qbus, name);
+ isa = DO_UPCAST(ISADevice, qdev, dev);
+ isa->iobase[0] = iobase;
+ isa->iobase[1] = iobase2;
+ qdev_init(dev);
+ return isa;
+}
diff --git a/hw/isa.h b/hw/isa.h
index f126ecc..49c58f8 100644
--- a/hw/isa.h
+++ b/hw/isa.h
@@ -1,8 +1,33 @@
#ifndef HW_ISA_H
#define HW_ISA_H
+
/* ISA bus */
#include "ioport.h"
+#include "qdev.h"
+
+typedef struct ISABus ISABus;
+typedef struct ISADevice ISADevice;
+typedef struct ISADeviceInfo ISADeviceInfo;
+
+struct ISADevice {
+ DeviceState qdev;
+ uint32_t iobase[2];
+ qemu_irq *irqs[2];
+ int nirqs;
+};
+
+typedef void (*isa_qdev_initfn)(ISADevice *dev);
+struct ISADeviceInfo {
+ DeviceInfo qdev;
+ isa_qdev_initfn init;
+};
+
+ISABus *isa_bus_new(DeviceState *dev);
+void isa_connect_irq(ISADevice *dev, int n, qemu_irq irq);
+void isa_init_irq(ISADevice *dev, qemu_irq *p);
+void isa_qdev_register(ISADeviceInfo *info);
+ISADevice *isa_create_simple(const char *name, uint32_t iobase, uint32_t iobase2);
extern target_phys_addr_t isa_mem_base;