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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2005-01-16 01:09:01 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2005-01-16 01:09:01 +0000
commit97ed14aead862362210c0367782274afa0f593b9 (patch)
tree34992c95f337ffe87b584f3909353e53f88a801b
parentd52cf7a64afb766b2b9a88738353bb5ec810b328 (diff)
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fix shufps/shufpd tests - added maskmov tests
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1225 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r--tests/test-i386.c46
1 files changed, 44 insertions, 2 deletions
diff --git a/tests/test-i386.c b/tests/test-i386.c
index b2ef1d8..94955c2 100644
--- a/tests/test-i386.c
+++ b/tests/test-i386.c
@@ -1733,6 +1733,22 @@ static uint64_t __attribute__((aligned(16))) test_values[4][2] = {
SSE_OP2(op);\
}
+#define SHUF_OP(op, ib)\
+{\
+ int i;\
+ a.q[0] = test_values[0][0];\
+ a.q[1] = test_values[0][1];\
+ b.q[0] = test_values[1][0];\
+ b.q[1] = test_values[1][1];\
+ asm volatile (#op " $" #ib ", %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
+ printf("%-9s: a=%016llx%016llx b=%016llx%016llx ib=%02x r=%016llx%016llx\n",\
+ #op,\
+ a.q[1], a.q[0],\
+ b.q[1], b.q[0],\
+ ib,\
+ r.q[1], r.q[0]);\
+}
+
#define PSHUF_OP(op, ib)\
{\
int i;\
@@ -2009,6 +2025,32 @@ void test_sse(void)
asm volatile ("pmovmskb %1, %0" : "=r" (r.l[0]) : "x" (a.dq));
printf("%-9s: r=%08x\n", "pmovmskb", r.l[0]);
+ {
+ r.q[0] = -1;
+ r.q[1] = -1;
+
+ a.q[0] = test_values[0][0];
+ a.q[1] = test_values[0][1];
+ b.q[0] = test_values[1][0];
+ b.q[1] = test_values[1][1];
+ asm volatile("maskmovq %1, %0" :
+ : "y" (a.q[0]), "y" (b.q[0]), "D" (&r)
+ : "memory");
+ printf("%-9s: r=%016llx a=%016llx b=%016llx\n",
+ "maskmov",
+ r.q[0],
+ a.q[0],
+ b.q[0]);
+ asm volatile("maskmovdqu %1, %0" :
+ : "x" (a.dq), "x" (b.dq), "D" (&r)
+ : "memory");
+ printf("%-9s: r=%016llx%016llx a=%016llx%016llx b=%016llx%016llx\n",
+ "maskmov",
+ r.q[1], r.q[0],
+ a.q[1], a.q[0],
+ b.q[1], b.q[0]);
+ }
+
asm volatile ("emms");
SSE_OP2(punpcklqdq);
@@ -2027,8 +2069,8 @@ void test_sse(void)
SSE_OP2(unpckhps);
SSE_OP2(unpckhpd);
- PSHUF_OP(shufps, 0x78);
- PSHUF_OP(shufpd, 0x02);
+ SHUF_OP(shufps, 0x78);
+ SHUF_OP(shufpd, 0x02);
PSHUF_OP(pshufd, 0x78);
PSHUF_OP(pshuflw, 0x78);