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authorblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2008-06-20 16:25:56 +0000
committerblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2008-06-20 16:25:56 +0000
commit81864572e67501d4385d23ba87163b17c3426eb8 (patch)
treeb15433056671428d4a62fa5bfdc060cfb584ca1a
parent3b4366de399b384d715c631d32f024c2bde3a38a (diff)
downloadqemu-81864572e67501d4385d23ba87163b17c3426eb8.zip
qemu-81864572e67501d4385d23ba87163b17c3426eb8.tar.gz
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Add support for boot_set command
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4764 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r--hw/sun4m.c22
-rw-r--r--hw/sun4u.c22
2 files changed, 44 insertions, 0 deletions
diff --git a/hw/sun4m.c b/hw/sun4m.c
index 09c2627..4bfc333 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -149,6 +149,26 @@ void DMA_register_channel (int nchan,
{
}
+static int nvram_boot_set(void *opaque, const char *boot_device)
+{
+ unsigned int i;
+ uint8_t image[sizeof(ohwcfg_v3_t)];
+ ohwcfg_v3_t *header = (ohwcfg_v3_t *)&image;
+ m48t59_t *nvram = (m48t59_t *)opaque;
+
+ for (i = 0; i < sizeof(image); i++)
+ image[i] = m48t59_read(nvram, i) & 0xff;
+
+ strcpy(header->boot_devices, boot_device);
+ header->nboot_devices = strlen(boot_device) & 0xff;
+ header->crc = cpu_to_be16(OHW_compute_crc(header, 0x00, 0xF8));
+
+ for (i = 0; i < sizeof(image); i++)
+ m48t59_write(nvram, i, image[i]);
+
+ return 0;
+}
+
extern int nographic;
static void nvram_init(m48t59_t *nvram, uint8_t *macaddr, const char *cmdline,
@@ -230,6 +250,8 @@ static void nvram_init(m48t59_t *nvram, uint8_t *macaddr, const char *cmdline,
for (i = 0; i < sizeof(image); i++)
m48t59_write(nvram, i, image[i]);
+
+ qemu_register_boot_set(nvram_boot_set, nvram);
}
static void *slavio_intctl;
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 6e1dee9..49f0494 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -68,6 +68,26 @@ void DMA_register_channel (int nchan,
{
}
+static int nvram_boot_set(void *opaque, const char *boot_device)
+{
+ unsigned int i;
+ uint8_t image[sizeof(ohwcfg_v3_t)];
+ ohwcfg_v3_t *header = (ohwcfg_v3_t *)&image;
+ m48t59_t *nvram = (m48t59_t *)opaque;
+
+ for (i = 0; i < sizeof(image); i++)
+ image[i] = m48t59_read(nvram, i) & 0xff;
+
+ strcpy(header->boot_devices, boot_device);
+ header->nboot_devices = strlen(boot_device) & 0xff;
+ header->crc = cpu_to_be16(OHW_compute_crc(header, 0x00, 0xF8));
+
+ for (i = 0; i < sizeof(image); i++)
+ m48t59_write(nvram, i, image[i]);
+
+ return 0;
+}
+
extern int nographic;
static int sun4u_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
@@ -155,6 +175,8 @@ static int sun4u_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
for (i = 0; i < sizeof(image); i++)
m48t59_write(nvram, i, image[i]);
+ qemu_register_boot_set(nvram_boot_set, nvram);
+
return 0;
}