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| author | Lars Munch <lars@segv.dk> | 2010-03-29 15:17:18 +0200 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2010-04-08 21:24:34 +0200 |
| commit | 14da56169886e90b3313d8128aecacf261ded607 (patch) | |
| tree | d6f2560b77c0131aa6bbca360757dfca47cb2222 | |
| parent | 3b4b86aace17ef07fc4f85a9662c991efbc83e15 (diff) | |
| download | qemu-14da56169886e90b3313d8128aecacf261ded607.zip qemu-14da56169886e90b3313d8128aecacf261ded607.tar.gz qemu-14da56169886e90b3313d8128aecacf261ded607.tar.bz2 | |
smc91c111: allow access to reserved register
Some drivers seems to access the reserved register in bank 0 so allow and
ignore these accesses.
Signed-off-by: Lars Munch <lars@segv.dk>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
| -rw-r--r-- | hw/smc91c111.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/hw/smc91c111.c b/hw/smc91c111.c index a2ef299..e4a2447 100644 --- a/hw/smc91c111.c +++ b/hw/smc91c111.c @@ -277,6 +277,8 @@ static void smc91c111_writeb(void *opaque, target_phys_addr_t offset, case 10: case 11: /* RPCR */ /* Ignored */ return; + case 12: case 13: /* Reserved */ + return; } break; @@ -463,6 +465,8 @@ static uint32_t smc91c111_readb(void *opaque, target_phys_addr_t offset) case 10: case 11: /* RPCR */ /* Not implemented. */ return 0; + case 12: case 13: /* Reserved */ + return 0; } break; |