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author | Blue Swirl <blauwirbel@gmail.com> | 2012-04-14 10:56:04 +0000 |
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committer | Blue Swirl <blauwirbel@gmail.com> | 2012-04-14 10:56:04 +0000 |
commit | 044c62aaf223b3b5a8eae4f5f79b210a65501e23 (patch) | |
tree | eef1e66b59305eb7dedbfbcc44ac47f042d2802d | |
parent | e92861ccb166883b0672b1ddfebce4f5de85e23d (diff) | |
parent | e554bbc6892394e506f5995ff4e0ca21cfe04a25 (diff) | |
download | qemu-044c62aaf223b3b5a8eae4f5f79b210a65501e23.zip qemu-044c62aaf223b3b5a8eae4f5f79b210a65501e23.tar.gz qemu-044c62aaf223b3b5a8eae4f5f79b210a65501e23.tar.bz2 |
Merge branch 'xtensa' of git://jcmvbkbc.spb.ru/dumb/qemu-xtensa
* 'xtensa' of git://jcmvbkbc.spb.ru/dumb/qemu-xtensa:
target-xtensa: Start QOM'ifying CPU init
target-xtensa: QOM'ify CPU reset
target-xtensa: QOM'ify CPU
target-xtensa: improve unit tests debugging
target-xtensa: Move helpers.h to helper.h
-rw-r--r-- | Makefile.target | 1 | ||||
-rw-r--r-- | target-xtensa/cpu-qom.h | 80 | ||||
-rw-r--r-- | target-xtensa/cpu.c | 88 | ||||
-rw-r--r-- | target-xtensa/cpu.h | 2 | ||||
-rw-r--r-- | target-xtensa/helper.c | 20 | ||||
-rw-r--r-- | target-xtensa/helper.h (renamed from target-xtensa/helpers.h) | 0 | ||||
-rw-r--r-- | target-xtensa/op_helper.c | 2 | ||||
-rw-r--r-- | target-xtensa/translate.c | 6 | ||||
-rw-r--r-- | tests/tcg/xtensa/Makefile | 3 | ||||
-rw-r--r-- | tests/tcg/xtensa/macros.inc | 17 | ||||
-rw-r--r-- | xtensa-semi.c | 2 |
11 files changed, 201 insertions, 20 deletions
diff --git a/Makefile.target b/Makefile.target index 8d2b232..65fb8f0 100644 --- a/Makefile.target +++ b/Makefile.target @@ -102,6 +102,7 @@ endif libobj-$(TARGET_SPARC) += int32_helper.o libobj-$(TARGET_SPARC64) += int64_helper.o libobj-$(TARGET_UNICORE32) += cpu.o +libobj-$(TARGET_XTENSA) += cpu.o libobj-$(TARGET_ALPHA) += int_helper.o fpu_helper.o sys_helper.o mem_helper.o libobj-y += disas.o diff --git a/target-xtensa/cpu-qom.h b/target-xtensa/cpu-qom.h new file mode 100644 index 0000000..1fd2f27 --- /dev/null +++ b/target-xtensa/cpu-qom.h @@ -0,0 +1,80 @@ +/* + * QEMU Xtensa CPU + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the Open Source and Linux Lab nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef QEMU_XTENSA_CPU_QOM_H +#define QEMU_XTENSA_CPU_QOM_H + +#include "qemu/cpu.h" +#include "cpu.h" + +#define TYPE_XTENSA_CPU "xtensa-cpu" + +#define XTENSA_CPU_CLASS(class) \ + OBJECT_CLASS_CHECK(XtensaCPUClass, (class), TYPE_XTENSA_CPU) +#define XTENSA_CPU(obj) \ + OBJECT_CHECK(XtensaCPU, (obj), TYPE_XTENSA_CPU) +#define XTENSA_CPU_GET_CLASS(obj) \ + OBJECT_GET_CLASS(XtensaCPUClass, (obj), TYPE_XTENSA_CPU) + +/** + * XtensaCPUClass: + * @parent_reset: The parent class' reset handler. + * + * An Xtensa CPU model. + */ +typedef struct XtensaCPUClass { + /*< private >*/ + CPUClass parent_class; + /*< public >*/ + + void (*parent_reset)(CPUState *cpu); +} XtensaCPUClass; + +/** + * XtensaCPU: + * @env: #CPUXtensaState + * + * An Xtensa CPU. + */ +typedef struct XtensaCPU { + /*< private >*/ + CPUState parent_obj; + /*< public >*/ + + CPUXtensaState env; +} XtensaCPU; + +static inline XtensaCPU *xtensa_env_get_cpu(const CPUXtensaState *env) +{ + return XTENSA_CPU(container_of(env, XtensaCPU, env)); +} + +#define ENV_GET_CPU(e) CPU(xtensa_env_get_cpu(e)) + + +#endif diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c new file mode 100644 index 0000000..97deacb --- /dev/null +++ b/target-xtensa/cpu.c @@ -0,0 +1,88 @@ +/* + * QEMU Xtensa CPU + * + * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab. + * Copyright (c) 2012 SUSE LINUX Products GmbH + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the Open Source and Linux Lab nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "cpu-qom.h" +#include "qemu-common.h" + + +/* CPUClass::reset() */ +static void xtensa_cpu_reset(CPUState *s) +{ + XtensaCPU *cpu = XTENSA_CPU(s); + XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(cpu); + CPUXtensaState *env = &cpu->env; + + xcc->parent_reset(s); + + env->exception_taken = 0; + env->pc = env->config->exception_vector[EXC_RESET]; + env->sregs[LITBASE] &= ~1; + env->sregs[PS] = xtensa_option_enabled(env->config, + XTENSA_OPTION_INTERRUPT) ? 0x1f : 0x10; + env->sregs[VECBASE] = env->config->vecbase; + env->sregs[IBREAKENABLE] = 0; + + env->pending_irq_level = 0; + reset_mmu(env); +} + +static void xtensa_cpu_initfn(Object *obj) +{ + XtensaCPU *cpu = XTENSA_CPU(obj); + CPUXtensaState *env = &cpu->env; + + cpu_exec_init(env); +} + +static void xtensa_cpu_class_init(ObjectClass *oc, void *data) +{ + CPUClass *cc = CPU_CLASS(oc); + XtensaCPUClass *xcc = XTENSA_CPU_CLASS(cc); + + xcc->parent_reset = cc->reset; + cc->reset = xtensa_cpu_reset; +} + +static const TypeInfo xtensa_cpu_type_info = { + .name = TYPE_XTENSA_CPU, + .parent = TYPE_CPU, + .instance_size = sizeof(XtensaCPU), + .instance_init = xtensa_cpu_initfn, + .abstract = false, + .class_size = sizeof(XtensaCPUClass), + .class_init = xtensa_cpu_class_init, +}; + +static void xtensa_cpu_register_types(void) +{ + type_register_static(&xtensa_cpu_type_info); +} + +type_init(xtensa_cpu_register_types) diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index a7bcf52..6d0ea7c 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -375,6 +375,7 @@ void xtensa_tlb_set_entry(CPUXtensaState *env, bool dtlb, int xtensa_get_physical_addr(CPUXtensaState *env, uint32_t vaddr, int is_write, int mmu_idx, uint32_t *paddr, uint32_t *page_size, unsigned *access); +void reset_mmu(CPUXtensaState *env); void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUXtensaState *env); void debug_exception_env(CPUXtensaState *new_env, uint32_t cause); @@ -470,6 +471,7 @@ static inline void cpu_get_tb_cpu_state(CPUXtensaState *env, target_ulong *pc, } #include "cpu-all.h" +#include "cpu-qom.h" #include "exec-all.h" static inline int cpu_has_work(CPUXtensaState *env) diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c index dab135c..2094227 100644 --- a/target-xtensa/helper.c +++ b/target-xtensa/helper.c @@ -33,20 +33,9 @@ #include "hw/loader.h" #endif -static void reset_mmu(CPUXtensaState *env); - void cpu_state_reset(CPUXtensaState *env) { - env->exception_taken = 0; - env->pc = env->config->exception_vector[EXC_RESET]; - env->sregs[LITBASE] &= ~1; - env->sregs[PS] = xtensa_option_enabled(env->config, - XTENSA_OPTION_INTERRUPT) ? 0x1f : 0x10; - env->sregs[VECBASE] = env->config->vecbase; - env->sregs[IBREAKENABLE] = 0; - - env->pending_irq_level = 0; - reset_mmu(env); + cpu_reset(ENV_GET_CPU(env)); } static struct XtensaConfigList *xtensa_cores; @@ -95,6 +84,7 @@ CPUXtensaState *cpu_xtensa_init(const char *cpu_model) { static int tcg_inited; static int debug_handler_inited; + XtensaCPU *cpu; CPUXtensaState *env; const XtensaConfig *config = NULL; XtensaConfigList *core = xtensa_cores; @@ -109,9 +99,9 @@ CPUXtensaState *cpu_xtensa_init(const char *cpu_model) return NULL; } - env = g_malloc0(sizeof(*env)); + cpu = XTENSA_CPU(object_new(TYPE_XTENSA_CPU)); + env = &cpu->env; env->config = config; - cpu_exec_init(env); if (!tcg_inited) { tcg_inited = 1; @@ -334,7 +324,7 @@ static void reset_tlb_region_way0(CPUXtensaState *env, } } -static void reset_mmu(CPUXtensaState *env) +void reset_mmu(CPUXtensaState *env) { if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) { env->sregs[RASID] = 0x04030201; diff --git a/target-xtensa/helpers.h b/target-xtensa/helper.h index 48a741e..48a741e 100644 --- a/target-xtensa/helpers.h +++ b/target-xtensa/helper.h diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c index cdef0db..806384f 100644 --- a/target-xtensa/op_helper.c +++ b/target-xtensa/op_helper.c @@ -27,7 +27,7 @@ #include "cpu.h" #include "dyngen-exec.h" -#include "helpers.h" +#include "helper.h" #include "host-utils.h" static void do_unaligned_access(target_ulong addr, int is_write, int is_user, diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index e0ff72b..492dbcc 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c @@ -37,9 +37,9 @@ #include "qemu-log.h" #include "sysemu.h" -#include "helpers.h" +#include "helper.h" #define GEN_HELPER 1 -#include "helpers.h" +#include "helper.h" typedef struct DisasContext { const XtensaConfig *config; @@ -183,7 +183,7 @@ void xtensa_translate_init(void) } } #define GEN_HELPER 2 -#include "helpers.h" +#include "helper.h" } static inline bool option_bits_enabled(DisasContext *dc, uint64_t opt) diff --git a/tests/tcg/xtensa/Makefile b/tests/tcg/xtensa/Makefile index 7e1e619..0ff0ccf 100644 --- a/tests/tcg/xtensa/Makefile +++ b/tests/tcg/xtensa/Makefile @@ -72,5 +72,8 @@ run-test_fail.tst: test_fail.tst debug-%.tst: %.tst $(SIM) $(SIMDEBUG) $(SIMFLAGS) ./$< +host-debug-%.tst: %.tst + gdb --args $(SIM) $(SIMFLAGS) ./$< + clean: $(RM) -fr $(TESTCASES) $(CRT) diff --git a/tests/tcg/xtensa/macros.inc b/tests/tcg/xtensa/macros.inc index 2d4515e..23bf3e9 100644 --- a/tests/tcg/xtensa/macros.inc +++ b/tests/tcg/xtensa/macros.inc @@ -29,7 +29,24 @@ main: exit .endm +.macro print text +.data +97: .ascii "\text\n" +98: + .align 4 +.text + movi a2, 4 + movi a3, 2 + movi a4, 97b + movi a5, 98b + sub a5, a5, a4 + simcall +.endm + .macro test name + //print test_\name +test_\name: +.global test_\name .endm .macro test_end diff --git a/xtensa-semi.c b/xtensa-semi.c index 5754b77..b7c8c34 100644 --- a/xtensa-semi.c +++ b/xtensa-semi.c @@ -31,7 +31,7 @@ #include <stddef.h> #include "cpu.h" #include "dyngen-exec.h" -#include "helpers.h" +#include "helper.h" #include "qemu-log.h" enum { |