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| author | Zhao Liu <zhao1.liu@intel.com> | 2025-06-27 11:51:26 +0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2025-07-14 10:27:07 +0200 |
| commit | a539cd26145c726fddd19eb0e2c20332960b0245 (patch) | |
| tree | 06b58a9c5b686efd5a9ee9d7fdb3c45e23f15c9d | |
| parent | 8113b7f0e662c138a4d0a739807cc3ad33bca8b3 (diff) | |
| download | qemu-a539cd26145c726fddd19eb0e2c20332960b0245.zip qemu-a539cd26145c726fddd19eb0e2c20332960b0245.tar.gz qemu-a539cd26145c726fddd19eb0e2c20332960b0245.tar.bz2 | |
i386/cpu: Mark EBX/ECX/EDX in CPUID 0x80000000 leaf as reserved for Intel
Per SDM,
80000000H EAX Maximum Input Value for Extended Function CPUID Information.
EBX Reserved.
ECX Reserved.
EDX Reserved.
EBX/ECX/EDX in CPUID 0x80000000 leaf are reserved. Intel is using 0x0
leaf to encode vendor.
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Tao Su <tao1.su@linux.intel.com>
Link: https://lore.kernel.org/r/20250627035129.2755537-2-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| -rw-r--r-- | target/i386/cpu.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 4f0c973..ae508fa 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -8280,9 +8280,15 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, break; case 0x80000000: *eax = env->cpuid_xlevel; - *ebx = env->cpuid_vendor1; - *edx = env->cpuid_vendor2; - *ecx = env->cpuid_vendor3; + + if (cpu->vendor_cpuid_only_v2 && + (IS_INTEL_CPU(env) || IS_ZHAOXIN_CPU(env))) { + *ebx = *ecx = *edx = 0; + } else { + *ebx = env->cpuid_vendor1; + *edx = env->cpuid_vendor2; + *ecx = env->cpuid_vendor3; + } break; case 0x80000001: *eax = env->cpuid_version; |