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| author | Zhao Liu <zhao1.liu@intel.com> | 2025-07-11 18:21:32 +0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2025-07-12 15:28:21 +0200 |
| commit | 216d9bb6d77162a93a0f09d72fdabfd252d941ce (patch) | |
| tree | 480165429fa136ee022f8577cdd9541f083baf19 | |
| parent | c416411c28a2b21e590943f300ce0336f109abb5 (diff) | |
| download | qemu-216d9bb6d77162a93a0f09d72fdabfd252d941ce.zip qemu-216d9bb6d77162a93a0f09d72fdabfd252d941ce.tar.gz qemu-216d9bb6d77162a93a0f09d72fdabfd252d941ce.tar.bz2 | |
i386/cpu: Add x-vendor-cpuid-only-v2 option for compatibility
Add a compat property "x-vendor-cpuid-only-v2" (for PC machine v10.0
and older) to keep the original behavior. This property will be used
to adjust vendor specific CPUID fields.
Make x-vendor-cpuid-only-v2 depend on x-vendor-cpuid-only. Although
x-vendor-cpuid-only and v2 should be initernal only, QEMU doesn't
support "internal" property. To avoid any other unexpected issues, check
the dependency.
Tested-by: Yi Lai <yi1.lai@intel.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250711102143.1622339-8-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| -rw-r--r-- | hw/i386/pc.c | 1 | ||||
| -rw-r--r-- | target/i386/cpu.c | 10 | ||||
| -rw-r--r-- | target/i386/cpu.h | 11 |
3 files changed, 21 insertions, 1 deletions
diff --git a/hw/i386/pc.c b/hw/i386/pc.c index a6fa792..7cfa61c 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -83,6 +83,7 @@ GlobalProperty pc_compat_10_0[] = { { TYPE_X86_CPU, "x-consistent-cache", "false" }, + { TYPE_X86_CPU, "x-vendor-cpuid-only-v2", "false" }, }; const size_t pc_compat_10_0_len = G_N_ELEMENTS(pc_compat_10_0); diff --git a/target/i386/cpu.c b/target/i386/cpu.c index ac22548..630a40d 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -8749,6 +8749,16 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) tcg_cflags_set(cs, CF_PCREL); #endif + /* + * x-vendor-cpuid-only and v2 should be initernal only. But + * QEMU doesn't support "internal" property. + */ + if (!cpu->vendor_cpuid_only && cpu->vendor_cpuid_only_v2) { + error_setg(errp, "x-vendor-cpuid-only-v2 property " + "depends on x-vendor-cpuid-only"); + return; + } + if (cpu->apic_id == UNASSIGNED_APIC_ID) { error_setg(errp, "apic-id property was not initialized properly"); return; diff --git a/target/i386/cpu.h b/target/i386/cpu.h index d3f7c53..d88481b 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2282,9 +2282,18 @@ struct ArchCPU { /* Enable auto level-increase for all CPUID leaves */ bool full_cpuid_auto_level; - /* Only advertise CPUID leaves defined by the vendor */ + /* + * Compatibility bits for old machine types (PC machine v6.0 and older). + * Only advertise CPUID leaves defined by the vendor. + */ bool vendor_cpuid_only; + /* + * Compatibility bits for old machine types (PC machine v10.0 and older). + * Only advertise CPUID leaves defined by the vendor. + */ + bool vendor_cpuid_only_v2; + /* Only advertise TOPOEXT features that AMD defines */ bool amd_topoext_features_only; |