diff options
author | Markus Armbruster <armbru@redhat.com> | 2020-06-30 11:03:43 +0200 |
---|---|---|
committer | Markus Armbruster <armbru@redhat.com> | 2020-07-02 06:25:29 +0200 |
commit | 3e9a88c3721cd0171ab4e51f0b3617befd124e2a (patch) | |
tree | 42b1ad4ebfb6982292fd265088f84dcfb925910f | |
parent | cbe3a8c582f964a222b64bce02a0a3ae22dc0efd (diff) | |
download | qemu-3e9a88c3721cd0171ab4e51f0b3617befd124e2a.zip qemu-3e9a88c3721cd0171ab4e51f0b3617befd124e2a.tar.gz qemu-3e9a88c3721cd0171ab4e51f0b3617befd124e2a.tar.bz2 |
riscv_hart: Fix riscv_harts_realize() error API violations
The Error ** argument must be NULL, &error_abort, &error_fatal, or a
pointer to a variable containing NULL. Passing an argument of the
latter kind twice without clearing it in between is wrong: if the
first call sets an error, it no longer points to NULL for the second
call.
riscv_harts_realize() is wrong that way: it passes @errp to
riscv_hart_realize() in a loop. I can't tell offhand whether this can
fail.
Fix by checking for failure in each iteration.
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Alistair Francis <Alistair.Francis@wdc.com>
Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: qemu-riscv@nongnu.org
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20200630090351.1247703-19-armbru@redhat.com>
-rw-r--r-- | hw/riscv/riscv_hart.c | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/hw/riscv/riscv_hart.c b/hw/riscv/riscv_hart.c index e26c382..f59fe52 100644 --- a/hw/riscv/riscv_hart.c +++ b/hw/riscv/riscv_hart.c @@ -40,19 +40,13 @@ static void riscv_harts_cpu_reset(void *opaque) cpu_reset(CPU(cpu)); } -static void riscv_hart_realize(RISCVHartArrayState *s, int idx, +static bool riscv_hart_realize(RISCVHartArrayState *s, int idx, char *cpu_type, Error **errp) { - Error *err = NULL; - object_initialize_child(OBJECT(s), "harts[*]", &s->harts[idx], cpu_type); s->harts[idx].env.mhartid = s->hartid_base + idx; qemu_register_reset(riscv_harts_cpu_reset, &s->harts[idx]); - qdev_realize(DEVICE(&s->harts[idx]), NULL, &err); - if (err) { - error_propagate(errp, err); - return; - } + return qdev_realize(DEVICE(&s->harts[idx]), NULL, errp); } static void riscv_harts_realize(DeviceState *dev, Error **errp) @@ -63,7 +57,9 @@ static void riscv_harts_realize(DeviceState *dev, Error **errp) s->harts = g_new0(RISCVCPU, s->num_harts); for (n = 0; n < s->num_harts; n++) { - riscv_hart_realize(s, n, s->cpu_type, errp); + if (!riscv_hart_realize(s, n, s->cpu_type, errp)) { + return; + } } } |