diff options
| author | Anton Johansson <anjo@rev.ng> | 2024-06-12 15:30:31 +0200 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-06-19 13:50:08 -0700 |
| commit | 3b279f73fa37bec8d3ba04a15f5153d6491cffaf (patch) | |
| tree | 1a307ed5905b2f5272c37fc8aa536e08a57b7422 | |
| parent | a96a4987385c2c0477bebffdc9a2d5ceabd43141 (diff) | |
| download | qemu-3b279f73fa37bec8d3ba04a15f5153d6491cffaf.zip qemu-3b279f73fa37bec8d3ba04a15f5153d6491cffaf.tar.gz qemu-3b279f73fa37bec8d3ba04a15f5153d6491cffaf.tar.bz2 | |
accel/tcg: Fix typo causing tb->page_addr[1] to not be recorded
For TBs crossing page boundaries, the 2nd page will never be
recorded/removed, as the index of the 2nd page is computed from the
address of the 1st page. This is due to a typo, fix it.
Cc: qemu-stable@nongnu.org
Fixes: deba78709a ("accel/tcg: Always lock pages before translation")
Signed-off-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240612133031.15298-1-anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | accel/tcg/tb-maint.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index 19ae679..cc0f5af 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -713,7 +713,7 @@ static void tb_record(TranslationBlock *tb) tb_page_addr_t paddr0 = tb_page_addr0(tb); tb_page_addr_t paddr1 = tb_page_addr1(tb); tb_page_addr_t pindex0 = paddr0 >> TARGET_PAGE_BITS; - tb_page_addr_t pindex1 = paddr0 >> TARGET_PAGE_BITS; + tb_page_addr_t pindex1 = paddr1 >> TARGET_PAGE_BITS; assert(paddr0 != -1); if (unlikely(paddr1 != -1) && pindex0 != pindex1) { @@ -745,7 +745,7 @@ static void tb_remove(TranslationBlock *tb) tb_page_addr_t paddr0 = tb_page_addr0(tb); tb_page_addr_t paddr1 = tb_page_addr1(tb); tb_page_addr_t pindex0 = paddr0 >> TARGET_PAGE_BITS; - tb_page_addr_t pindex1 = paddr0 >> TARGET_PAGE_BITS; + tb_page_addr_t pindex1 = paddr1 >> TARGET_PAGE_BITS; assert(paddr0 != -1); if (unlikely(paddr1 != -1) && pindex0 != pindex1) { |