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author | Bin Meng <bmeng.cn@gmail.com> | 2019-09-06 09:19:55 -0700 |
---|---|---|
committer | Palmer Dabbelt <palmer@sifive.com> | 2019-09-17 08:42:45 -0700 |
commit | 131f0932cf0194355cbcac326c93c2830ebd5148 (patch) | |
tree | 2c70d3a3c06bce16441dd5c9cb9f04b8fa9dc3d4 | |
parent | a2360c854fb56f9506d81be8b86ba577c0dbefc3 (diff) | |
download | qemu-131f0932cf0194355cbcac326c93c2830ebd5148.zip qemu-131f0932cf0194355cbcac326c93c2830ebd5148.tar.gz qemu-131f0932cf0194355cbcac326c93c2830ebd5148.tar.bz2 |
riscv: hw: Remove the unnecessary include of target/riscv/cpu.h
The inclusion of "target/riscv/cpu.h" is unnecessary in various
sifive model drivers.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
-rw-r--r-- | hw/riscv/sifive_prci.c | 1 | ||||
-rw-r--r-- | hw/riscv/sifive_test.c | 1 | ||||
-rw-r--r-- | hw/riscv/sifive_uart.c | 1 |
3 files changed, 0 insertions, 3 deletions
diff --git a/hw/riscv/sifive_prci.c b/hw/riscv/sifive_prci.c index 982fbb2..c413f0c 100644 --- a/hw/riscv/sifive_prci.c +++ b/hw/riscv/sifive_prci.c @@ -22,7 +22,6 @@ #include "hw/sysbus.h" #include "qemu/log.h" #include "qemu/module.h" -#include "target/riscv/cpu.h" #include "hw/hw.h" #include "hw/riscv/sifive_prci.h" diff --git a/hw/riscv/sifive_test.c b/hw/riscv/sifive_test.c index aa544e7..339195c 100644 --- a/hw/riscv/sifive_test.c +++ b/hw/riscv/sifive_test.c @@ -23,7 +23,6 @@ #include "qemu/log.h" #include "qemu/module.h" #include "sysemu/runstate.h" -#include "target/riscv/cpu.h" #include "hw/hw.h" #include "hw/riscv/sifive_test.h" diff --git a/hw/riscv/sifive_uart.c b/hw/riscv/sifive_uart.c index 215990b..a403ae9 100644 --- a/hw/riscv/sifive_uart.c +++ b/hw/riscv/sifive_uart.c @@ -22,7 +22,6 @@ #include "hw/sysbus.h" #include "chardev/char.h" #include "chardev/char-fe.h" -#include "target/riscv/cpu.h" #include "hw/hw.h" #include "hw/irq.h" #include "hw/riscv/sifive_uart.h" |