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author | Peter Maydell <peter.maydell@linaro.org> | 2018-08-24 13:17:36 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2018-08-24 13:17:36 +0100 |
commit | 0e0456ab8895a5e85998904549e331d36c2692a5 (patch) | |
tree | 4affd8e366f48c0051dab9aa216fd58c17b5f1c4 | |
parent | cac0d80809d9c323cb0ed06843804844c7e09f6b (diff) | |
download | qemu-0e0456ab8895a5e85998904549e331d36c2692a5.zip qemu-0e0456ab8895a5e85998904549e331d36c2692a5.tar.gz qemu-0e0456ab8895a5e85998904549e331d36c2692a5.tar.bz2 |
target/arm: Implement RAZ/WI HACTLR2
The v8 AArch32 HACTLR2 register maps to bits [63:32] of ACTLR_EL2.
We implement ACTLR_EL2 as RAZ/WI, so make HACTLR2 also RAZ/WI.
(We put the regdef next to ACTLR_EL2 as a reminder in case we
ever make ACTLR_EL2 something other than RAZ/WI).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Message-id: 20180820153020.21478-2-peter.maydell@linaro.org
-rw-r--r-- | target/arm/helper.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index 977f8b0..d816e72 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -5459,6 +5459,16 @@ void register_cp_regs_for_features(ARMCPU *cpu) REGINFO_SENTINEL }; define_arm_cp_regs(cpu, auxcr_reginfo); + if (arm_feature(env, ARM_FEATURE_V8)) { + /* HACTLR2 maps to ACTLR_EL2[63:32] and is not in ARMv7 */ + ARMCPRegInfo hactlr2_reginfo = { + .name = "HACTLR2", .state = ARM_CP_STATE_AA32, + .cp = 15, .opc1 = 4, .crn = 1, .crm = 0, .opc2 = 3, + .access = PL2_RW, .type = ARM_CP_CONST, + .resetvalue = 0 + }; + define_one_arm_cp_reg(cpu, &hactlr2_reginfo); + } } if (arm_feature(env, ARM_FEATURE_CBAR)) { |