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| author | Nathan Egge <negge@xiph.org> | 2023-08-03 09:14:24 -0400 |
|---|---|---|
| committer | Michael Tokarev <mjt@tls.msk.ru> | 2023-09-10 19:39:41 +0300 |
| commit | ee638bc5b53cff87768b0b7c6d2c4a4e275994f6 (patch) | |
| tree | e43a57b18c640e41b7b93ec4810313e7571f3adf | |
| parent | bb5f9036d5f6914215c75e19048444b2ce06b190 (diff) | |
| download | qemu-ee638bc5b53cff87768b0b7c6d2c4a4e275994f6.zip qemu-ee638bc5b53cff87768b0b7c6d2c4a4e275994f6.tar.gz qemu-ee638bc5b53cff87768b0b7c6d2c4a4e275994f6.tar.bz2 | |
linux-user/elfload: Set V in ELF_HWCAP for RISC-V
Set V bit for hwcap if misa is set.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1793
Signed-off-by: Nathan Egge <negge@xiph.org>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Tested-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-Id: <20230803131424.40744-1-negge@xiph.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
(cherry picked from commit 4333f0924c2f2ca8efaebaed8c24f55f77d8b013)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| -rw-r--r-- | linux-user/elfload.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 88ef26d..a3e78a7 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -1679,7 +1679,8 @@ static uint32_t get_elf_hwcap(void) #define MISA_BIT(EXT) (1 << (EXT - 'A')) RISCVCPU *cpu = RISCV_CPU(thread_cpu); uint32_t mask = MISA_BIT('I') | MISA_BIT('M') | MISA_BIT('A') - | MISA_BIT('F') | MISA_BIT('D') | MISA_BIT('C'); + | MISA_BIT('F') | MISA_BIT('D') | MISA_BIT('C') + | MISA_BIT('V'); return cpu->env.misa_ext & mask; #undef MISA_BIT |