aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2011-01-14 20:39:18 +0100
committerAurelien Jarno <aurelien@aurel32.net>2011-01-14 20:39:18 +0100
commit9ea62f571ce8953dba1d2bad2bdeaf9c3a84b7d7 (patch)
tree8895bae6a06582fa53a2cbee9a9bec360cb53c76
parent6f3300ad2b5a1e7090720993d9fcb9f550259e12 (diff)
downloadqemu-9ea62f571ce8953dba1d2bad2bdeaf9c3a84b7d7.zip
qemu-9ea62f571ce8953dba1d2bad2bdeaf9c3a84b7d7.tar.gz
qemu-9ea62f571ce8953dba1d2bad2bdeaf9c3a84b7d7.tar.bz2
target-arm: Fix implementation of VRSQRTS
The implementation of the ARM VRSQRTS instruction (which calculates (3 - op1 * op2) / 2) was missing the division operation. It also did not handle the special cases of (0,inf) and (inf,0). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
-rw-r--r--target-arm/helper.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 705b99f..ac47de0 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2612,8 +2612,16 @@ float32 HELPER(recps_f32)(float32 a, float32 b, CPUState *env)
float32 HELPER(rsqrts_f32)(float32 a, float32 b, CPUState *env)
{
float_status *s = &env->vfp.fp_status;
+ float32 two = int32_to_float32(2, s);
float32 three = int32_to_float32(3, s);
- return float32_sub(three, float32_mul(a, b, s), s);
+ float32 product;
+ if ((float32_is_infinity(a) && float32_is_zero_or_denormal(b)) ||
+ (float32_is_infinity(b) && float32_is_zero_or_denormal(a))) {
+ product = float32_zero;
+ } else {
+ product = float32_mul(a, b, s);
+ }
+ return float32_div(float32_sub(three, product, s), two, s);
}
/* NEON helpers. */