Fix compilation on Sparc host, implement ld and st

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4457 c046a42c-6fe2-441c-8c8c-71466251a162

3 files changed, 15 insertions, 9 deletions

diff --git a/cpu-exec.c b/cpu-exec.c
index 30caab1..435fdf8 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -53,19 +53,14 @@ static unsigned long next_tb;
 // Work around ugly bugs in glibc that mangle global register contents
 
 static volatile void *saved_env;
-static volatile unsigned long saved_t0, saved_i7;
 #undef SAVE_GLOBALS
 #define SAVE_GLOBALS() do {                                     \
         saved_env = env;                                        \
-        saved_t0 = T0;                                          \
-        asm volatile ("st %%i7, [%0]" : : "r" (&saved_i7));     \
     } while(0)
 
 #undef RESTORE_GLOBALS
 #define RESTORE_GLOBALS() do {                                  \
         env = (void *)saved_env;                                \
-        T0 = saved_t0;                                          \
-        asm volatile ("ld [%0], %%i7" : : "r" (&saved_i7));     \
     } while(0)
 
 static int sparc_setjmp(jmp_buf buf)
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index fc58d50..6e18f03 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -266,13 +266,19 @@ static inline void tcg_out_ldst(TCGContext *s, int ret, int addr, int offset, in
 static inline void tcg_out_ld(TCGContext *s, TCGType type, int ret,
                               int arg1, tcg_target_long arg2)
 {
-    fprintf(stderr, "unimplemented %s\n", __func__);
+    if (type == TCG_TYPE_I32)
+        tcg_out_ldst(s, ret, arg1, arg2, LDUW);
+    else
+        tcg_out_ldst(s, ret, arg1, arg2, LDX);
 }
 
 static inline void tcg_out_st(TCGContext *s, TCGType type, int arg,
                               int arg1, tcg_target_long arg2)
 {
-    fprintf(stderr, "unimplemented %s\n", __func__);
+    if (type == TCG_TYPE_I32)
+        tcg_out_ldst(s, arg, arg1, arg2, STW);
+    else
+        tcg_out_ldst(s, arg, arg1, arg2, STX);
 }
 
 static inline void tcg_out_arith(TCGContext *s, int rd, int rs1, int rs2,
@@ -312,10 +318,14 @@ static inline void tcg_out_nop(TCGContext *s)
     tcg_out32(s, SETHI | INSN_RD(TCG_REG_G0) | 0);
 }
 
-static inline void tcg_target_prologue(TCGContext *s)
+/* Generate global QEMU prologue and epilogue code */
+void tcg_target_qemu_prologue(TCGContext *s)
 {
     tcg_out32(s, SAVE | INSN_RD(TCG_REG_O6) | INSN_RS1(TCG_REG_O6) |
               INSN_IMM13(-TCG_TARGET_STACK_MINFRAME));
+    tcg_out32(s, JMPL | INSN_RD(TCG_REG_G0) | INSN_RS1(TCG_REG_O0) |
+              INSN_RS2(TCG_REG_G0));
+    tcg_out_nop(s);
 }
 
 static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
index 3cd2dc7..195d6c7 100644
--- a/tcg/sparc/tcg-target.h
+++ b/tcg/sparc/tcg-target.h
@@ -84,8 +84,9 @@ enum {
 /* optional instructions */
 //#define TCG_TARGET_HAS_bswap_i32
 //#define TCG_TARGET_HAS_bswap_i64
+//#define TCG_TARGET_HAS_neg_i32
+//#define TCG_TARGET_HAS_neg_i64
 
-#define TCG_TARGET_NEEDS_PROLOGUE 1
 
 /* Note: must be synced with dyngen-exec.h */
 #ifdef HOST_SOLARIS