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author | Paolo Bonzini <pbonzini@redhat.com> | 2014-12-05 10:52:46 +0100 |
---|---|---|
committer | Paolo Bonzini <pbonzini@redhat.com> | 2014-12-15 12:21:02 +0100 |
commit | 78a611f1936b3eac8ed78a2be2146a742a85212c (patch) | |
tree | 0b6a8e5195961b29fb487d132372862e479870e1 | |
parent | b3a4f0b1a072a467d003755ca0e55c5be38387cb (diff) | |
download | qemu-78a611f1936b3eac8ed78a2be2146a742a85212c.zip qemu-78a611f1936b3eac8ed78a2be2146a742a85212c.tar.gz qemu-78a611f1936b3eac8ed78a2be2146a742a85212c.tar.bz2 |
target-i386: add f16c and rdrand to Haswell and Broadwell
Both were added in Ivy Bridge (for which we do not have a CPU model
yet!).
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
-rw-r--r-- | hw/i386/pc_piix.c | 4 | ||||
-rw-r--r-- | hw/i386/pc_q35.c | 4 | ||||
-rw-r--r-- | target-i386/cpu.c | 4 |
3 files changed, 10 insertions, 2 deletions
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 548d99a..7647e34 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -319,6 +319,10 @@ static void pc_compat_2_2(MachineState *machine) x86_cpu_compat_set_features("Opteron_G3", FEAT_1_EDX, 0, CPUID_VME); x86_cpu_compat_set_features("Opteron_G4", FEAT_1_EDX, 0, CPUID_VME); x86_cpu_compat_set_features("Opteron_G5", FEAT_1_EDX, 0, CPUID_VME); + x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, 0, CPUID_EXT_F16C); + x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, 0, CPUID_EXT_RDRAND); + x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, 0, CPUID_EXT_F16C); + x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, 0, CPUID_EXT_RDRAND); } static void pc_compat_2_1(MachineState *machine) diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 1105ef4..858e828 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -298,6 +298,10 @@ static void pc_compat_2_2(MachineState *machine) x86_cpu_compat_set_features("Opteron_G3", FEAT_1_EDX, 0, CPUID_VME); x86_cpu_compat_set_features("Opteron_G4", FEAT_1_EDX, 0, CPUID_VME); x86_cpu_compat_set_features("Opteron_G5", FEAT_1_EDX, 0, CPUID_VME); + x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, 0, CPUID_EXT_F16C); + x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, 0, CPUID_EXT_RDRAND); + x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, 0, CPUID_EXT_F16C); + x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, 0, CPUID_EXT_RDRAND); } static void pc_compat_2_1(MachineState *machine) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 136c457..b2bb9a4 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -1060,7 +1060,7 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 | CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE | - CPUID_EXT_PCID, + CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND, .features[FEAT_8000_0001_EDX] = CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX | CPUID_EXT2_SYSCALL, @@ -1095,7 +1095,7 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 | CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE | - CPUID_EXT_PCID, + CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND, .features[FEAT_8000_0001_EDX] = CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX | CPUID_EXT2_SYSCALL, |