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| author | Michael S. Tsirkin <mst@redhat.com> | 2013-09-01 13:26:03 +0300 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2013-09-15 09:36:57 +0300 |
| commit | 636228a887c4d5c0dc313bbf936de969b420a91a (patch) | |
| tree | 8873bb4f8fc4f22036761bfd3d60a086879e10e8 | |
| parent | 2d1fe1873a984d1c2c89ffa3d12949cafc718551 (diff) | |
| download | qemu-636228a887c4d5c0dc313bbf936de969b420a91a.zip qemu-636228a887c4d5c0dc313bbf936de969b420a91a.tar.gz qemu-636228a887c4d5c0dc313bbf936de969b420a91a.tar.bz2 | |
q35: make pci window address/size match guest cfg
For Q35, MMCFG address and size are guest configurable.
Update w32 property to make it behave accordingly.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| -rw-r--r-- | hw/pci-host/q35.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 5473504..72f6b72 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -214,6 +214,16 @@ static void mch_update_pciexbar(MCHPCIState *mch) } addr = pciexbar & addr_mask; pcie_host_mmcfg_update(pehb, enable, addr, length); + /* Leave enough space for the MCFG BAR */ + /* + * TODO: this matches current bios behaviour, but it's not a power of two, + * which means an MTRR can't cover it exactly. + */ + if (enable) { + mch->pci_info.w32.begin = addr + length; + } else { + mch->pci_info.w32.begin = MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT; + } } /* PAM */ |