diff options
author | Benoît Canet <benoit.canet@gmail.com> | 2011-11-24 14:31:16 +0100 |
---|---|---|
committer | Avi Kivity <avi@redhat.com> | 2011-11-28 15:38:42 +0200 |
commit | 5f2be17af15806e334d892447ca5863fb4922003 (patch) | |
tree | c58d4dbf9a6f053bd6ee073ca148f2530fc9be88 | |
parent | 663d94467a9c2895754dc4bfd7232db08b3373ad (diff) | |
download | qemu-5f2be17af15806e334d892447ca5863fb4922003.zip qemu-5f2be17af15806e334d892447ca5863fb4922003.tar.gz qemu-5f2be17af15806e334d892447ca5863fb4922003.tar.bz2 |
lm32_uart: convert to memory API
Signed-off-by: Benoît Canet <benoit.canet@gmail.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
-rw-r--r-- | hw/lm32_uart.c | 31 |
1 files changed, 15 insertions, 16 deletions
diff --git a/hw/lm32_uart.c b/hw/lm32_uart.c index 3678545..46a5ae0 100644 --- a/hw/lm32_uart.c +++ b/hw/lm32_uart.c @@ -91,6 +91,7 @@ enum { struct LM32UartState { SysBusDevice busdev; + MemoryRegion iomem; CharDriverState *chr; qemu_irq irq; @@ -124,7 +125,8 @@ static void uart_update_irq(LM32UartState *s) qemu_set_irq(s->irq, irq); } -static uint32_t uart_read(void *opaque, target_phys_addr_t addr) +static uint64_t uart_read(void *opaque, target_phys_addr_t addr, + unsigned size) { LM32UartState *s = opaque; uint32_t r = 0; @@ -158,7 +160,8 @@ static uint32_t uart_read(void *opaque, target_phys_addr_t addr) return r; } -static void uart_write(void *opaque, target_phys_addr_t addr, uint32_t value) +static void uart_write(void *opaque, target_phys_addr_t addr, + uint64_t value, unsigned size) { LM32UartState *s = opaque; unsigned char ch = value; @@ -192,16 +195,14 @@ static void uart_write(void *opaque, target_phys_addr_t addr, uint32_t value) uart_update_irq(s); } -static CPUReadMemoryFunc * const uart_read_fn[] = { - NULL, - NULL, - &uart_read, -}; - -static CPUWriteMemoryFunc * const uart_write_fn[] = { - NULL, - NULL, - &uart_write, +static const MemoryRegionOps uart_ops = { + .read = uart_read, + .write = uart_write, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + .min_access_size = 4, + .max_access_size = 4, + }, }; static void uart_rx(void *opaque, const uint8_t *buf, int size) @@ -245,13 +246,11 @@ static void uart_reset(DeviceState *d) static int lm32_uart_init(SysBusDevice *dev) { LM32UartState *s = FROM_SYSBUS(typeof(*s), dev); - int uart_regs; sysbus_init_irq(dev, &s->irq); - uart_regs = cpu_register_io_memory(uart_read_fn, uart_write_fn, s, - DEVICE_NATIVE_ENDIAN); - sysbus_init_mmio(dev, R_MAX * 4, uart_regs); + memory_region_init_io(&s->iomem, &uart_ops, s, "uart", R_MAX * 4); + sysbus_init_mmio_region(dev, &s->iomem); s->chr = qdev_init_chardev(&dev->qdev); if (s->chr) { |