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| author | Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> | 2016-07-28 23:44:12 +0530 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2016-09-07 12:40:11 +1000 |
| commit | 4110b586defd8499041275a9eca66264c344e823 (patch) | |
| tree | 2394cb8439b453e7dd7db32f89f5916f73b7b081 | |
| parent | b07c32dc4bdda102803ed6699438fef059c8f408 (diff) | |
| download | qemu-4110b586defd8499041275a9eca66264c344e823.zip qemu-4110b586defd8499041275a9eca66264c344e823.tar.gz qemu-4110b586defd8499041275a9eca66264c344e823.tar.bz2 | |
target-ppc: implement branch-less divd[o][.]
Similar to divw, implement branch-less divd.
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| -rw-r--r-- | target-ppc/translate.c | 48 |
1 files changed, 26 insertions, 22 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index f69836d..5fe7a9d 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -1170,37 +1170,41 @@ GEN_DIVE(divweo, divwe, 1); static inline void gen_op_arith_divd(DisasContext *ctx, TCGv ret, TCGv arg1, TCGv arg2, int sign, int compute_ov) { - TCGLabel *l1 = gen_new_label(); - TCGLabel *l2 = gen_new_label(); + TCGv_i64 t0 = tcg_temp_new_i64(); + TCGv_i64 t1 = tcg_temp_new_i64(); + TCGv_i64 t2 = tcg_temp_new_i64(); + TCGv_i64 t3 = tcg_temp_new_i64(); - tcg_gen_brcondi_i64(TCG_COND_EQ, arg2, 0, l1); - if (sign) { - TCGLabel *l3 = gen_new_label(); - tcg_gen_brcondi_i64(TCG_COND_NE, arg2, -1, l3); - tcg_gen_brcondi_i64(TCG_COND_EQ, arg1, INT64_MIN, l1); - gen_set_label(l3); - tcg_gen_div_i64(ret, arg1, arg2); - } else { - tcg_gen_divu_i64(ret, arg1, arg2); - } - if (compute_ov) { - tcg_gen_movi_tl(cpu_ov, 0); - } - tcg_gen_br(l2); - gen_set_label(l1); + tcg_gen_mov_i64(t0, arg1); + tcg_gen_mov_i64(t1, arg2); if (sign) { - tcg_gen_sari_i64(ret, arg1, 63); + tcg_gen_setcondi_i64(TCG_COND_EQ, t2, t0, INT64_MIN); + tcg_gen_setcondi_i64(TCG_COND_EQ, t3, t1, -1); + tcg_gen_and_i64(t2, t2, t3); + tcg_gen_setcondi_i64(TCG_COND_EQ, t3, t1, 0); + tcg_gen_or_i64(t2, t2, t3); + tcg_gen_movi_i64(t3, 0); + tcg_gen_movcond_i64(TCG_COND_NE, t1, t2, t3, t2, t1); + tcg_gen_div_i64(ret, t0, t1); } else { - tcg_gen_movi_i64(ret, 0); + tcg_gen_setcondi_i64(TCG_COND_EQ, t2, t1, 0); + tcg_gen_movi_i64(t3, 0); + tcg_gen_movcond_i64(TCG_COND_NE, t1, t2, t3, t2, t1); + tcg_gen_divu_i64(ret, t0, t1); } if (compute_ov) { - tcg_gen_movi_tl(cpu_ov, 1); - tcg_gen_movi_tl(cpu_so, 1); + tcg_gen_mov_tl(cpu_ov, t2); + tcg_gen_or_tl(cpu_so, cpu_so, cpu_ov); } - gen_set_label(l2); + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); + tcg_temp_free_i64(t2); + tcg_temp_free_i64(t3); + if (unlikely(Rc(ctx->opcode) != 0)) gen_set_Rc0(ctx, ret); } + #define GEN_INT_ARITH_DIVD(name, opc3, sign, compute_ov) \ static void glue(gen_, name)(DisasContext *ctx) \ { \ |