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author | Andreas Färber <andreas.faerber@web.de> | 2013-06-30 19:29:36 +0200 |
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committer | Andreas Färber <afaerber@suse.de> | 2013-11-05 17:47:29 +0100 |
commit | fc719d77412513a07b718e1f083b64dbcac62524 (patch) | |
tree | f4cb8282a645d4e55a955fc897f9ffd8e91720b4 | |
parent | 9eb39db520cea30620b24098b6d731f78cc819a0 (diff) | |
download | qemu-fc719d77412513a07b718e1f083b64dbcac62524.zip qemu-fc719d77412513a07b718e1f083b64dbcac62524.tar.gz qemu-fc719d77412513a07b718e1f083b64dbcac62524.tar.bz2 |
a9mpcore: Embed A9SCUState
Prepares for QOM realize.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
-rw-r--r-- | hw/cpu/a9mpcore.c | 16 | ||||
-rw-r--r-- | hw/misc/a9scu.c | 18 | ||||
-rw-r--r-- | include/hw/misc/a9scu.h | 31 |
3 files changed, 42 insertions, 23 deletions
diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c index c57b149..df92e3f 100644 --- a/hw/cpu/a9mpcore.c +++ b/hw/cpu/a9mpcore.c @@ -10,6 +10,7 @@ #include "hw/sysbus.h" #include "hw/intc/arm_gic.h" +#include "hw/misc/a9scu.h" #define TYPE_A9MPCORE_PRIV "a9mpcore_priv" #define A9MPCORE_PRIV(obj) \ @@ -24,10 +25,10 @@ typedef struct A9MPPrivState { MemoryRegion container; DeviceState *mptimer; DeviceState *wdt; - DeviceState *scu; uint32_t num_irq; GICState gic; + A9SCUState scu; } A9MPPrivState; static void a9mp_priv_set_irq(void *opaque, int irq, int level) @@ -46,12 +47,15 @@ static void a9mp_priv_initfn(Object *obj) object_initialize(&s->gic, sizeof(s->gic), TYPE_ARM_GIC); qdev_set_parent_bus(DEVICE(&s->gic), sysbus_get_default()); + + object_initialize(&s->scu, sizeof(s->scu), TYPE_A9_SCU); + qdev_set_parent_bus(DEVICE(&s->scu), sysbus_get_default()); } static int a9mp_priv_init(SysBusDevice *dev) { A9MPPrivState *s = A9MPCORE_PRIV(dev); - DeviceState *gicdev; + DeviceState *gicdev, *scudev; SysBusDevice *timerbusdev, *wdtbusdev, *gicbusdev, *scubusdev; int i; @@ -67,10 +71,10 @@ static int a9mp_priv_init(SysBusDevice *dev) /* Pass through inbound GPIO lines to the GIC */ qdev_init_gpio_in(DEVICE(dev), a9mp_priv_set_irq, s->num_irq - 32); - s->scu = qdev_create(NULL, "a9-scu"); - qdev_prop_set_uint32(s->scu, "num-cpu", s->num_cpu); - qdev_init_nofail(s->scu); - scubusdev = SYS_BUS_DEVICE(s->scu); + scudev = DEVICE(&s->scu); + qdev_prop_set_uint32(scudev, "num-cpu", s->num_cpu); + qdev_init_nofail(scudev); + scubusdev = SYS_BUS_DEVICE(&s->scu); s->mptimer = qdev_create(NULL, "arm_mptimer"); qdev_prop_set_uint32(s->mptimer, "num-cpu", s->num_cpu); diff --git a/hw/misc/a9scu.c b/hw/misc/a9scu.c index 2661014..4434945 100644 --- a/hw/misc/a9scu.c +++ b/hw/misc/a9scu.c @@ -8,23 +8,7 @@ * This code is licensed under the GPL. */ -#include "hw/sysbus.h" - -/* A9MP private memory region. */ - -typedef struct A9SCUState { - /*< private >*/ - SysBusDevice parent_obj; - /*< public >*/ - - MemoryRegion iomem; - uint32_t control; - uint32_t status; - uint32_t num_cpu; -} A9SCUState; - -#define TYPE_A9_SCU "a9-scu" -#define A9_SCU(obj) OBJECT_CHECK(A9SCUState, (obj), TYPE_A9_SCU) +#include "hw/misc/a9scu.h" static uint64_t a9_scu_read(void *opaque, hwaddr offset, unsigned size) diff --git a/include/hw/misc/a9scu.h b/include/hw/misc/a9scu.h new file mode 100644 index 0000000..efb0c30 --- /dev/null +++ b/include/hw/misc/a9scu.h @@ -0,0 +1,31 @@ +/* + * Cortex-A9MPCore Snoop Control Unit (SCU) emulation. + * + * Copyright (c) 2009 CodeSourcery. + * Copyright (c) 2011 Linaro Limited. + * Written by Paul Brook, Peter Maydell. + * + * This code is licensed under the GPL. + */ +#ifndef HW_MISC_A9SCU_H +#define HW_MISC_A9SCU_H + +#include "hw/sysbus.h" + +/* A9MP private memory region. */ + +typedef struct A9SCUState { + /*< private >*/ + SysBusDevice parent_obj; + /*< public >*/ + + MemoryRegion iomem; + uint32_t control; + uint32_t status; + uint32_t num_cpu; +} A9SCUState; + +#define TYPE_A9_SCU "a9-scu" +#define A9_SCU(obj) OBJECT_CHECK(A9SCUState, (obj), TYPE_A9_SCU) + +#endif |