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| author | Aurelien Jarno <aurelien@aurel32.net> | 2012-09-16 13:12:20 +0200 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2012-09-21 19:53:16 +0200 |
| commit | f16640f47bb0b8f907fff08a2e8d1c891ce82480 (patch) | |
| tree | 45b1441db9ec249dc6628978da8a920b725cb54d | |
| parent | ad8d25a11f13cb8acc69558d03cd69202f5a3cc2 (diff) | |
| download | qemu-f16640f47bb0b8f907fff08a2e8d1c891ce82480.zip qemu-f16640f47bb0b8f907fff08a2e8d1c891ce82480.tar.gz qemu-f16640f47bb0b8f907fff08a2e8d1c891ce82480.tar.bz2 | |
target-sh4: optimize xtrct
The register being 32 bit long, after a shift to the right by 16 bits,
the upper 16 bit are already cleared. There is no need to call ext16u
to clear them.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
| -rw-r--r-- | target-sh4/translate.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 41a1f22..92c5a1f 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -751,7 +751,6 @@ static void _decode_opc(DisasContext * ctx) tcg_gen_shli_i32(high, REG(B7_4), 16); low = tcg_temp_new(); tcg_gen_shri_i32(low, REG(B11_8), 16); - tcg_gen_ext16u_i32(low, low); tcg_gen_or_i32(REG(B11_8), high, low); tcg_temp_free(low); tcg_temp_free(high); |