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| author | Alexander Graf <agraf@suse.de> | 2011-05-30 12:09:12 +0200 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2011-06-03 13:34:02 +0200 |
| commit | e1b45cca620bf33168914283f81f6f3d8847f76b (patch) | |
| tree | 3ecc05f2b9a74be67d33dda04dc01027649dd252 | |
| parent | 5b185639c5740998de403415c749ac98e13418fd (diff) | |
| download | qemu-e1b45cca620bf33168914283f81f6f3d8847f76b.zip qemu-e1b45cca620bf33168914283f81f6f3d8847f76b.tar.gz qemu-e1b45cca620bf33168914283f81f6f3d8847f76b.tar.bz2 | |
s390x: implement lrvgr
The LRVGR instruction was missing. Implement it, so everyone's happy.
Reported-by: Balazs Kutil <bkutil@novell.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
| -rw-r--r-- | target-s390x/translate.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target-s390x/translate.c b/target-s390x/translate.c index afeb5e6..eda4624 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -3473,6 +3473,9 @@ static void disas_b9(DisasContext *s, int op, int r1, int r2) tcg_temp_free_i64(tmp2); tcg_temp_free_i64(tmp3); break; + case 0x0f: /* LRVGR R1,R2 [RRE] */ + tcg_gen_bswap64_i64(regs[r1], regs[r2]); + break; case 0x1f: /* LRVR R1,R2 [RRE] */ tmp32_1 = load_reg32(r2); tcg_gen_bswap32_i32(tmp32_1, tmp32_1); |