aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorEdgar E. Iglesias <edgar.iglesias@gmail.com>2009-05-20 21:31:33 +0200
committerEdgar E. Iglesias <edgar.iglesias@gmail.com>2009-05-26 21:10:28 +0200
commitb779e29ed8919b18644b41bf581bdbcffdcb962e (patch)
treec0f48eee0c379d092db118f53fd42a6c306fc826
parent8dfbe4e839ef775be5e365b2e458d4bc43ce600f (diff)
downloadqemu-b779e29ed8919b18644b41bf581bdbcffdcb962e.zip
qemu-b779e29ed8919b18644b41bf581bdbcffdcb962e.tar.gz
qemu-b779e29ed8919b18644b41bf581bdbcffdcb962e.tar.bz2
microblaze: linux-user support.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
-rw-r--r--cpu-exec.c68
-rw-r--r--elf.h2
-rw-r--r--linux-user/elfload.c22
-rw-r--r--linux-user/main.c96
-rw-r--r--linux-user/signal.c216
-rw-r--r--linux-user/syscall.c2
-rw-r--r--linux-user/syscall_defs.h73
7 files changed, 474 insertions, 5 deletions
diff --git a/cpu-exec.c b/cpu-exec.c
index ef378ac..8734337 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -246,6 +246,7 @@ int cpu_exec(CPUState *env1)
#elif defined(TARGET_ALPHA)
#elif defined(TARGET_ARM)
#elif defined(TARGET_PPC)
+#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
#elif defined(TARGET_SH4)
#elif defined(TARGET_CRIS)
@@ -300,6 +301,8 @@ int cpu_exec(CPUState *env1)
env->old_exception = -1;
#elif defined(TARGET_PPC)
do_interrupt(env);
+#elif defined(TARGET_MICROBLAZE)
+ do_interrupt(env);
#elif defined(TARGET_MIPS)
do_interrupt(env);
#elif defined(TARGET_SPARC)
@@ -367,7 +370,8 @@ int cpu_exec(CPUState *env1)
cpu_loop_exit();
}
#if defined(TARGET_ARM) || defined(TARGET_SPARC) || defined(TARGET_MIPS) || \
- defined(TARGET_PPC) || defined(TARGET_ALPHA) || defined(TARGET_CRIS)
+ defined(TARGET_PPC) || defined(TARGET_ALPHA) || defined(TARGET_CRIS) || \
+ defined(TARGET_MICROBLAZE)
if (interrupt_request & CPU_INTERRUPT_HALT) {
env->interrupt_request &= ~CPU_INTERRUPT_HALT;
env->halted = 1;
@@ -436,6 +440,15 @@ int cpu_exec(CPUState *env1)
env->interrupt_request &= ~CPU_INTERRUPT_HARD;
next_tb = 0;
}
+#elif defined(TARGET_MICROBLAZE)
+ if ((interrupt_request & CPU_INTERRUPT_HARD)
+ && (env->sregs[SR_MSR] & MSR_IE)
+ && !(env->sregs[SR_MSR] & (MSR_EIP | MSR_BIP))
+ && !(env->iflags & (D_FLAG | IMM_FLAG))) {
+ env->exception_index = EXCP_IRQ;
+ do_interrupt(env);
+ next_tb = 0;
+ }
#elif defined(TARGET_MIPS)
if ((interrupt_request & CPU_INTERRUPT_HARD) &&
(env->CP0_Status & env->CP0_Cause & CP0Ca_IP_mask) &&
@@ -565,6 +578,8 @@ int cpu_exec(CPUState *env1)
env->sr = (env->sr & 0xffe0)
| env->cc_dest | (env->cc_x << 4);
log_cpu_state(env, 0);
+#elif defined(TARGET_MICROBLAZE)
+ log_cpu_state(env, 0);
#elif defined(TARGET_MIPS)
log_cpu_state(env, 0);
#elif defined(TARGET_SH4)
@@ -682,6 +697,7 @@ int cpu_exec(CPUState *env1)
env->cc_op = CC_OP_FLAGS;
env->sr = (env->sr & 0xffe0)
| env->cc_dest | (env->cc_x << 4);
+#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
#elif defined(TARGET_SH4)
#elif defined(TARGET_ALPHA)
@@ -1028,6 +1044,56 @@ static inline int handle_cpu_signal(unsigned long pc, unsigned long address,
return 1;
}
+#elif defined (TARGET_MICROBLAZE)
+static inline int handle_cpu_signal(unsigned long pc, unsigned long address,
+ int is_write, sigset_t *old_set,
+ void *puc)
+{
+ TranslationBlock *tb;
+ int ret;
+
+ if (cpu_single_env)
+ env = cpu_single_env; /* XXX: find a correct solution for multithread */
+#if defined(DEBUG_SIGNAL)
+ printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n",
+ pc, address, is_write, *(unsigned long *)old_set);
+#endif
+ /* XXX: locking issue */
+ if (is_write && page_unprotect(h2g(address), pc, puc)) {
+ return 1;
+ }
+
+ /* see if it is an MMU fault */
+ ret = cpu_mb_handle_mmu_fault(env, address, is_write, MMU_USER_IDX, 0);
+ if (ret < 0)
+ return 0; /* not an MMU fault */
+ if (ret == 0)
+ return 1; /* the MMU fault was handled without causing real CPU fault */
+
+ /* now we have a real cpu fault */
+ tb = tb_find_pc(pc);
+ if (tb) {
+ /* the PC is inside the translated code. It means that we have
+ a virtual CPU fault */
+ cpu_restore_state(tb, env, pc, puc);
+ }
+ if (ret == 1) {
+#if 0
+ printf("PF exception: PC=0x" TARGET_FMT_lx " error=0x%x %p\n",
+ env->PC, env->error_code, tb);
+#endif
+ /* we restore the process signal mask as the sigreturn should
+ do it (XXX: use sigsetjmp) */
+ sigprocmask(SIG_SETMASK, old_set, NULL);
+ cpu_loop_exit();
+ } else {
+ /* activate soft MMU for this block */
+ cpu_resume_from_signal(env, puc);
+ }
+ /* never comes here */
+ return 1;
+}
+
#elif defined (TARGET_SH4)
static inline int handle_cpu_signal(unsigned long pc, unsigned long address,
int is_write, sigset_t *old_set,
diff --git a/elf.h b/elf.h
index 861f1d3..182cad9 100644
--- a/elf.h
+++ b/elf.h
@@ -119,6 +119,8 @@ typedef int64_t Elf64_Sxword;
*/
#define EM_S390_OLD 0xA390
+#define EM_XILINX_MICROBLAZE 0xBAAB
+
/* This is the info that is needed to parse the dynamic section of the file */
#define DT_NULL 0
#define DT_NEEDED 1
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 508cb37..190ad14 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -453,6 +453,28 @@ static inline void init_thread(struct target_pt_regs *regs, struct image_info *i
#endif /* TARGET_MIPS */
+#ifdef TARGET_MICROBLAZE
+
+#define ELF_START_MMAP 0x80000000
+
+#define elf_check_arch(x) ( (x) == EM_XILINX_MICROBLAZE )
+
+#define ELF_CLASS ELFCLASS32
+#define ELF_DATA ELFDATA2MSB
+#define ELF_ARCH EM_MIPS
+
+static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop)
+{
+ regs->pc = infop->entry;
+ regs->r1 = infop->start_stack;
+
+}
+
+#define USE_ELF_CORE_DUMP
+#define ELF_EXEC_PAGESIZE 4096
+
+#endif /* TARGET_MICROBLAZE */
+
#ifdef TARGET_SH4
#define ELF_START_MMAP 0x80000000
diff --git a/linux-user/main.c b/linux-user/main.c
index 17cdfa6..4832d3f 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -2036,6 +2036,66 @@ void cpu_loop (CPUState *env)
}
#endif
+#ifdef TARGET_MICROBLAZE
+void cpu_loop (CPUState *env)
+{
+ int trapnr, ret;
+ target_siginfo_t info;
+
+ while (1) {
+ trapnr = cpu_mb_exec (env);
+ switch (trapnr) {
+ case 0xaa:
+ {
+ info.si_signo = SIGSEGV;
+ info.si_errno = 0;
+ /* XXX: check env->error_code */
+ info.si_code = TARGET_SEGV_MAPERR;
+ info._sifields._sigfault._addr = 0;
+ queue_signal(env, info.si_signo, &info);
+ }
+ break;
+ case EXCP_INTERRUPT:
+ /* just indicate that signals should be handled asap */
+ break;
+ case EXCP_BREAK:
+ /* Return address is 4 bytes after the call. */
+ env->regs[14] += 4;
+ ret = do_syscall(env,
+ env->regs[12],
+ env->regs[5],
+ env->regs[6],
+ env->regs[7],
+ env->regs[8],
+ env->regs[9],
+ env->regs[10]);
+ env->regs[3] = ret;
+ env->sregs[SR_PC] = env->regs[14];
+ break;
+ case EXCP_DEBUG:
+ {
+ int sig;
+
+ sig = gdb_handlesig (env, TARGET_SIGTRAP);
+ if (sig)
+ {
+ info.si_signo = sig;
+ info.si_errno = 0;
+ info.si_code = TARGET_TRAP_BRKPT;
+ queue_signal(env, info.si_signo, &info);
+ }
+ }
+ break;
+ default:
+ printf ("Unhandled trap: 0x%x\n", trapnr);
+ cpu_dump_state(env, stderr, fprintf, 0);
+ exit (1);
+ }
+ process_pending_signals (env);
+ }
+}
+#endif
+
#ifdef TARGET_M68K
void cpu_loop(CPUM68KState *env)
@@ -2698,6 +2758,42 @@ int main(int argc, char **argv, char **envp)
env->sr = regs->sr;
ts->sim_syscalls = 1;
}
+#elif defined(TARGET_MICROBLAZE)
+ {
+ env->regs[0] = regs->r0;
+ env->regs[1] = regs->r1;
+ env->regs[2] = regs->r2;
+ env->regs[3] = regs->r3;
+ env->regs[4] = regs->r4;
+ env->regs[5] = regs->r5;
+ env->regs[6] = regs->r6;
+ env->regs[7] = regs->r7;
+ env->regs[8] = regs->r8;
+ env->regs[9] = regs->r9;
+ env->regs[10] = regs->r10;
+ env->regs[11] = regs->r11;
+ env->regs[12] = regs->r12;
+ env->regs[13] = regs->r13;
+ env->regs[14] = regs->r14;
+ env->regs[15] = regs->r15;
+ env->regs[16] = regs->r16;
+ env->regs[17] = regs->r17;
+ env->regs[18] = regs->r18;
+ env->regs[19] = regs->r19;
+ env->regs[20] = regs->r20;
+ env->regs[21] = regs->r21;
+ env->regs[22] = regs->r22;
+ env->regs[23] = regs->r23;
+ env->regs[24] = regs->r24;
+ env->regs[25] = regs->r25;
+ env->regs[26] = regs->r26;
+ env->regs[27] = regs->r27;
+ env->regs[28] = regs->r28;
+ env->regs[29] = regs->r29;
+ env->regs[30] = regs->r30;
+ env->regs[31] = regs->r31;
+ env->sregs[SR_PC] = regs->pc;
+ }
#elif defined(TARGET_MIPS)
{
int i;
diff --git a/linux-user/signal.c b/linux-user/signal.c
index 9c9c7eb..371927e 100644
--- a/linux-user/signal.c
+++ b/linux-user/signal.c
@@ -3011,6 +3011,222 @@ badframe:
force_sig(TARGET_SIGSEGV);
return 0;
}
+#elif defined(TARGET_MICROBLAZE)
+
+struct target_sigcontext {
+ struct target_pt_regs regs; /* needs to be first */
+ uint32_t oldmask;
+};
+
+/* Signal frames. */
+struct target_signal_frame {
+ struct target_sigcontext sc;
+ uint32_t extramask[TARGET_NSIG_WORDS - 1];
+ uint32_t tramp[2];
+};
+
+struct rt_signal_frame {
+ struct siginfo info;
+ struct ucontext uc;
+ uint32_t tramp[2];
+};
+
+static void setup_sigcontext(struct target_sigcontext *sc, CPUState *env)
+{
+ __put_user(env->regs[0], &sc->regs.r0);
+ __put_user(env->regs[1], &sc->regs.r1);
+ __put_user(env->regs[2], &sc->regs.r2);
+ __put_user(env->regs[3], &sc->regs.r3);
+ __put_user(env->regs[4], &sc->regs.r4);
+ __put_user(env->regs[5], &sc->regs.r5);
+ __put_user(env->regs[6], &sc->regs.r6);
+ __put_user(env->regs[7], &sc->regs.r7);
+ __put_user(env->regs[8], &sc->regs.r8);
+ __put_user(env->regs[9], &sc->regs.r9);
+ __put_user(env->regs[10], &sc->regs.r10);
+ __put_user(env->regs[11], &sc->regs.r11);
+ __put_user(env->regs[12], &sc->regs.r12);
+ __put_user(env->regs[13], &sc->regs.r13);
+ __put_user(env->regs[14], &sc->regs.r14);
+ __put_user(env->regs[15], &sc->regs.r15);
+ __put_user(env->regs[16], &sc->regs.r16);
+ __put_user(env->regs[17], &sc->regs.r17);
+ __put_user(env->regs[18], &sc->regs.r18);
+ __put_user(env->regs[19], &sc->regs.r19);
+ __put_user(env->regs[20], &sc->regs.r20);
+ __put_user(env->regs[21], &sc->regs.r21);
+ __put_user(env->regs[22], &sc->regs.r22);
+ __put_user(env->regs[23], &sc->regs.r23);
+ __put_user(env->regs[24], &sc->regs.r24);
+ __put_user(env->regs[25], &sc->regs.r25);
+ __put_user(env->regs[26], &sc->regs.r26);
+ __put_user(env->regs[27], &sc->regs.r27);
+ __put_user(env->regs[28], &sc->regs.r28);
+ __put_user(env->regs[29], &sc->regs.r29);
+ __put_user(env->regs[30], &sc->regs.r30);
+ __put_user(env->regs[31], &sc->regs.r31);
+ __put_user(env->sregs[SR_PC], &sc->regs.pc);
+}
+
+static void restore_sigcontext(struct target_sigcontext *sc, CPUState *env)
+{
+ __get_user(env->regs[0], &sc->regs.r0);
+ __get_user(env->regs[1], &sc->regs.r1);
+ __get_user(env->regs[2], &sc->regs.r2);
+ __get_user(env->regs[3], &sc->regs.r3);
+ __get_user(env->regs[4], &sc->regs.r4);
+ __get_user(env->regs[5], &sc->regs.r5);
+ __get_user(env->regs[6], &sc->regs.r6);
+ __get_user(env->regs[7], &sc->regs.r7);
+ __get_user(env->regs[8], &sc->regs.r8);
+ __get_user(env->regs[9], &sc->regs.r9);
+ __get_user(env->regs[10], &sc->regs.r10);
+ __get_user(env->regs[11], &sc->regs.r11);
+ __get_user(env->regs[12], &sc->regs.r12);
+ __get_user(env->regs[13], &sc->regs.r13);
+ __get_user(env->regs[14], &sc->regs.r14);
+ __get_user(env->regs[15], &sc->regs.r15);
+ __get_user(env->regs[16], &sc->regs.r16);
+ __get_user(env->regs[17], &sc->regs.r17);
+ __get_user(env->regs[18], &sc->regs.r18);
+ __get_user(env->regs[19], &sc->regs.r19);
+ __get_user(env->regs[20], &sc->regs.r20);
+ __get_user(env->regs[21], &sc->regs.r21);
+ __get_user(env->regs[22], &sc->regs.r22);
+ __get_user(env->regs[23], &sc->regs.r23);
+ __get_user(env->regs[24], &sc->regs.r24);
+ __get_user(env->regs[25], &sc->regs.r25);
+ __get_user(env->regs[26], &sc->regs.r26);
+ __get_user(env->regs[27], &sc->regs.r27);
+ __get_user(env->regs[28], &sc->regs.r28);
+ __get_user(env->regs[29], &sc->regs.r29);
+ __get_user(env->regs[30], &sc->regs.r30);
+ __get_user(env->regs[31], &sc->regs.r31);
+ __get_user(env->sregs[SR_PC], &sc->regs.pc);
+}
+
+static abi_ulong get_sigframe(struct target_sigaction *ka,
+ CPUState *env, int frame_size)
+{
+ abi_ulong sp = env->regs[1];
+
+ if ((ka->sa_flags & SA_ONSTACK) != 0 && !on_sig_stack(sp))
+ sp = target_sigaltstack_used.ss_sp + target_sigaltstack_used.ss_size;
+
+ return ((sp - frame_size) & -8UL);
+}
+
+static void setup_frame(int sig, struct target_sigaction *ka,
+ target_sigset_t *set, CPUState *env)
+{
+ struct target_signal_frame *frame;
+ abi_ulong frame_addr;
+ int err = 0;
+ int i;
+
+ frame_addr = get_sigframe(ka, env, sizeof *frame);
+ if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0))
+ goto badframe;
+
+ /* Save the mask. */
+ err |= __put_user(set->sig[0], &frame->sc.oldmask);
+ if (err)
+ goto badframe;
+
+ for(i = 1; i < TARGET_NSIG_WORDS; i++) {
+ if (__put_user(set->sig[i], &frame->extramask[i - 1]))
+ goto badframe;
+ }
+
+ setup_sigcontext(&frame->sc, env);
+
+ /* Set up to return from userspace. If provided, use a stub
+ already in userspace. */
+ /* minus 8 is offset to cater for "rtsd r15,8" offset */
+ if (ka->sa_flags & TARGET_SA_RESTORER) {
+ env->regs[15] = ((unsigned long)ka->sa_restorer)-8;
+ } else {
+ uint32_t t;
+ /* Note, these encodings are _big endian_! */
+ /* addi r12, r0, __NR_sigreturn */
+ t = 0x31800000UL | TARGET_NR_sigreturn;
+ err |= __put_user(t, frame->tramp + 0);
+ /* brki r14, 0x8 */
+ t = 0xb9cc0008UL;
+ err |= __put_user(t, frame->tramp + 1);
+
+ /* Return from sighandler will jump to the tramp.
+ Negative 8 offset because return is rtsd r15, 8 */
+ env->regs[15] = ((unsigned long)frame->tramp) - 8;
+ }
+
+ if (err)
+ goto badframe;
+
+ /* Set up registers for signal handler */
+ env->regs[1] = (unsigned long) frame;
+ /* Signal handler args: */
+ env->regs[5] = sig; /* Arg 0: signum */
+ env->regs[6] = (unsigned long) &frame->sc; /* arg 1: sigcontext */
+
+ /* Offset of 4 to handle microblaze rtid r14, 0 */
+ env->sregs[SR_PC] = (unsigned long)ka->_sa_handler;
+
+ unlock_user_struct(frame, frame_addr, 1);
+ return;
+ badframe:
+ unlock_user_struct(frame, frame_addr, 1);
+ force_sig(TARGET_SIGSEGV);
+}
+
+static void setup_rt_frame(int sig, struct target_sigaction *ka,
+ target_siginfo_t *info,
+ target_sigset_t *set, CPUState *env)
+{
+ fprintf(stderr, "Microblaze setup_rt_frame: not implemented\n");
+}
+
+long do_sigreturn(CPUState *env)
+{
+ struct target_signal_frame *frame;
+ abi_ulong frame_addr;
+ target_sigset_t target_set;
+ sigset_t set;
+ int i;
+
+ frame_addr = env->regs[R_SP];
+ /* Make sure the guest isn't playing games. */
+ if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 1))
+ goto badframe;
+
+ /* Restore blocked signals */
+ if (__get_user(target_set.sig[0], &frame->sc.oldmask))
+ goto badframe;
+ for(i = 1; i < TARGET_NSIG_WORDS; i++) {
+ if (__get_user(target_set.sig[i], &frame->extramask[i - 1]))
+ goto badframe;
+ }
+ target_to_host_sigset_internal(&set, &target_set);
+ sigprocmask(SIG_SETMASK, &set, NULL);
+
+ restore_sigcontext(&frame->sc, env);
+ /* We got here through a sigreturn syscall, our path back is via an
+ rtb insn so setup r14 for that. */
+ env->regs[14] = env->sregs[SR_PC];
+
+ unlock_user_struct(frame, frame_addr, 0);
+ return env->regs[10];
+ badframe:
+ unlock_user_struct(frame, frame_addr, 0);
+ force_sig(TARGET_SIGSEGV);
+}
+
+long do_rt_sigreturn(CPUState *env)
+{
+ fprintf(stderr, "Microblaze do_rt_sigreturn: not implemented\n");
+ return -TARGET_ENOSYS;
+}
+
#elif defined(TARGET_CRIS)
struct target_sigcontext {
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index b58220d..a0915a4 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -4854,7 +4854,7 @@ abi_long do_syscall(void *cpu_env, int num, abi_long arg1,
#endif
#ifdef TARGET_NR_mmap
case TARGET_NR_mmap:
-#if (defined(TARGET_I386) && defined(TARGET_ABI32)) || defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_CRIS)
+#if (defined(TARGET_I386) && defined(TARGET_ABI32)) || defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_CRIS) || defined(TARGET_MICROBLAZE)
{
abi_ulong *v;
abi_ulong v1, v2, v3, v4, v5, v6;
diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h
index 7f0b0df..e2ba0bb 100644
--- a/linux-user/syscall_defs.h
+++ b/linux-user/syscall_defs.h
@@ -59,7 +59,8 @@
#define TARGET_IOC_READ 2U
#elif defined(TARGET_PPC) || defined(TARGET_ALPHA) || \
- defined(TARGET_SPARC) || defined(TARGET_MIPS)
+ defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE) || \
+ defined(TARGET_MIPS)
#define TARGET_IOC_SIZEBITS 13
#define TARGET_IOC_DIRBITS 3
@@ -286,7 +287,7 @@ struct target_sigaction;
int do_sigaction(int sig, const struct target_sigaction *act,
struct target_sigaction *oact);
-#if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_SPARC) || defined(TARGET_PPC) || defined(TARGET_MIPS) || defined (TARGET_SH4) || defined(TARGET_M68K) || defined(TARGET_ALPHA) || defined(TARGET_CRIS)
+#if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_SPARC) || defined(TARGET_PPC) || defined(TARGET_MIPS) || defined (TARGET_SH4) || defined(TARGET_M68K) || defined(TARGET_ALPHA) || defined(TARGET_CRIS) || defined(TARGET_MICROBLAZE)
#if defined(TARGET_SPARC)
#define TARGET_SA_NOCLDSTOP 8u
@@ -1170,6 +1171,54 @@ struct __attribute__((__packed__)) target_stat64 {
unsigned int __unused5;
};
+#elif defined(TARGET_MICROBLAZE)
+
+struct target_stat {
+ abi_ulong st_dev;
+ abi_ulong st_ino;
+ unsigned int st_mode;
+ unsigned short st_nlink;
+ unsigned int st_uid;
+ unsigned int st_gid;
+ abi_ulong st_rdev;
+ abi_ulong st_size;
+ abi_ulong st_blksize;
+ abi_ulong st_blocks;
+ abi_ulong target_st_atime;
+ abi_ulong target_st_atime_nsec;
+ abi_ulong target_st_mtime;
+ abi_ulong target_st_mtime_nsec;
+ abi_ulong target_st_ctime;
+ abi_ulong target_st_ctime_nsec;
+ abi_ulong __unused4;
+ abi_ulong __unused5;
+};
+
+/* FIXME: Microblaze no-mmu user-space has a difference stat64 layout... */
+struct __attribute__((__packed__)) target_stat64 {
+ uint64_t st_dev;
+ uint64_t st_ino;
+ uint32_t st_mode;
+ uint32_t st_nlink;
+ uint32_t st_uid;
+ uint32_t st_gid;
+ uint64_t st_rdev;
+ uint32_t __pad2;
+
+ int64_t st_size;
+ int32_t st_blksize;
+ int64_t st_blocks; /* Number 512-byte blocks allocated. */
+
+ int target_st_atime;
+ unsigned int target_st_atime_nsec;
+ int target_st_mtime;
+ unsigned int target_st_mtime_nsec;
+ int target_st_ctime;
+ unsigned int target_st_ctime_nsec;
+ uint32_t __unused4;
+ uint32_t __unused5;
+};
+
#elif defined(TARGET_M68K)
struct target_stat {
@@ -1719,6 +1768,24 @@ struct target_statfs64 {
#define TARGET_O_NOFOLLOW 0100000 /* don't follow links */
#define TARGET_O_LARGEFILE 0200000
#define TARGET_O_DIRECT 0400000 /* direct disk access hint */
+#elif defined (TARGET_MICROBLAZE)
+#define TARGET_O_ACCMODE 0003
+#define TARGET_O_RDONLY 00
+#define TARGET_O_WRONLY 01
+#define TARGET_O_RDWR 02
+#define TARGET_O_CREAT 0100 /* not fcntl */
+#define TARGET_O_EXCL 0200 /* not fcntl */
+#define TARGET_O_NOCTTY 0400 /* not fcntl */
+#define TARGET_O_TRUNC 01000 /* not fcntl */
+#define TARGET_O_APPEND 02000
+#define TARGET_O_NONBLOCK 04000
+#define TARGET_O_NDELAY TARGET_O_NONBLOCK
+#define TARGET_O_SYNC 010000
+#define TARGET_FASYNC 020000 /* fcntl, for BSD compatibility */
+#define TARGET_O_DIRECTORY 040000 /* must be a directory */
+#define TARGET_O_NOFOLLOW 0100000 /* don't follow links */
+#define TARGET_O_LARGEFILE 0200000
+#define TARGET_O_DIRECT 0400000 /* direct disk access hint */
#elif defined (TARGET_SPARC)
#define TARGET_O_RDONLY 0x0000
#define TARGET_O_WRONLY 0x0001
@@ -1806,7 +1873,7 @@ struct target_flock {
struct target_flock64 {
short l_type;
short l_whence;
-#if defined(TARGET_PPC) || defined(TARGET_X86_64) || defined(TARGET_MIPS) || defined(TARGET_SPARC) || defined(TARGET_HPPA)
+#if defined(TARGET_PPC) || defined(TARGET_X86_64) || defined(TARGET_MIPS) || defined(TARGET_SPARC) || defined(TARGET_HPPA) || defined (TARGET_MICROBLAZE)
int __pad;
#endif
unsigned long long l_start;