diff options
| author | Alistair Francis <alistair.francis@xilinx.com> | 2018-03-09 17:09:43 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-03-09 17:09:43 +0000 |
| commit | f9a697112ee64180354f98309a5d6b691cc8699d (patch) | |
| tree | 00680529bed683a45c50eb78209affdf7e787748 | |
| parent | b39b61e410022f96ceb53d4381d25cba5126ac44 (diff) | |
| download | qemu-f9a697112ee64180354f98309a5d6b691cc8699d.zip qemu-f9a697112ee64180354f98309a5d6b691cc8699d.tar.gz qemu-f9a697112ee64180354f98309a5d6b691cc8699d.tar.bz2 | |
target/arm: Add a core count property
The cortex A53 TRM specifies that bits 24 and 25 of the L2CTLR register
specify the number of cores in the processor, not the total number of
cores in the system. To report this correctly on machines with multiple
CPU clusters (ARM's big.LITTLE or Xilinx's ZynqMP) we need to allow
the machine to overwrite this value. To do this let's add an optional
property.
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Message-id: ef01d95c0759e88f47f22d11b14c91512a658b4f.1520018138.git.alistair.francis@xilinx.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target/arm/cpu.c | 6 | ||||
| -rw-r--r-- | target/arm/cpu.h | 5 | ||||
| -rw-r--r-- | target/arm/cpu64.c | 6 |
3 files changed, 15 insertions, 2 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 6b77aaa..3e4e9f1 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -939,6 +939,11 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) cs->num_ases = 1; } cpu_address_space_init(cs, ARMASIdx_NS, "cpu-memory", cs->memory); + + /* No core_count specified, default to smp_cpus. */ + if (cpu->core_count == -1) { + cpu->core_count = smp_cpus; + } #endif qemu_init_vcpu(cs); @@ -1765,6 +1770,7 @@ static Property arm_cpu_properties[] = { DEFINE_PROP_UINT64("mp-affinity", ARMCPU, mp_affinity, ARM64_AFFINITY_INVALID), DEFINE_PROP_INT32("node-id", ARMCPU, node_id, CPU_UNSET_NUMA_NODE_ID), + DEFINE_PROP_INT32("core-count", ARMCPU, core_count, -1), DEFINE_PROP_END_OF_LIST() }; diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 8dd6b78..3fa8fda 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -745,6 +745,11 @@ struct ARMCPU { /* Uniprocessor system with MP extensions */ bool mp_is_up; + /* Specify the number of cores in this CPU cluster. Used for the L2CTLR + * register. + */ + int32_t core_count; + /* The instance init functions for implementation-specific subclasses * set these fields to specify the implementation-dependent values of * various constant registers and reset values of non-constant diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 4228713..dd9ba97 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -42,8 +42,10 @@ static inline void unset_feature(CPUARMState *env, int feature) #ifndef CONFIG_USER_ONLY static uint64_t a57_a53_l2ctlr_read(CPUARMState *env, const ARMCPRegInfo *ri) { - /* Number of processors is in [25:24]; otherwise we RAZ */ - return (smp_cpus - 1) << 24; + ARMCPU *cpu = arm_env_get_cpu(env); + + /* Number of cores is in [25:24]; otherwise we RAZ */ + return (cpu->core_count - 1) << 24; } #endif |