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| author | Rahul Pathak <rpathak@ventanamicro.com> | 2022-08-16 10:24:08 +0530 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2022-09-07 09:18:33 +0200 |
| commit | e0dea2f55f678a1aa1dab3a25c13f52d68b4ec2b (patch) | |
| tree | 1c8e14de6d79d7d6f37f137f537a792d0b31750a | |
| parent | d1af78745cfc4e8efdda9b3484b32bbb4507276f (diff) | |
| download | qemu-e0dea2f55f678a1aa1dab3a25c13f52d68b4ec2b.zip qemu-e0dea2f55f678a1aa1dab3a25c13f52d68b4ec2b.tar.gz qemu-e0dea2f55f678a1aa1dab3a25c13f52d68b4ec2b.tar.bz2 | |
target/riscv: Add xicondops in ISA entry
XVentanaCondOps is Ventana custom extension. Add
its extension entry in the ISA Ext array
Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20220816045408.1231135-1-rpathak@ventanamicro.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| -rw-r--r-- | target/riscv/cpu.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index d4635c7..e0d5941 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -102,6 +102,7 @@ static const struct isa_ext_data isa_edata_arr[] = { ISA_EXT_DATA_ENTRY(svinval, true, PRIV_VERSION_1_12_0, ext_svinval), ISA_EXT_DATA_ENTRY(svnapot, true, PRIV_VERSION_1_12_0, ext_svnapot), ISA_EXT_DATA_ENTRY(svpbmt, true, PRIV_VERSION_1_12_0, ext_svpbmt), + ISA_EXT_DATA_ENTRY(xventanacondops, true, PRIV_VERSION_1_12_0, ext_XVentanaCondOps), }; static bool isa_ext_is_enabled(RISCVCPU *cpu, |